From: "Paul E. McKenney" <paulmck@linux.ibm.com>
To: Vineet Gupta <Vineet.Gupta1@synopsys.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Will Deacon <Will.Deacon@arm.com>,
arcml <linux-snps-arc@lists.infradead.org>,
lkml <linux-kernel@vger.kernel.org>,
"linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>
Subject: Re: single copy atomicity for double load/stores on 32-bit systems
Date: Mon, 3 Jun 2019 13:13:24 -0700 [thread overview]
Message-ID: <20190603201324.GN28207@linux.ibm.com> (raw)
In-Reply-To: <C2D7FE5348E1B147BCA15975FBA2307501A2522B5B@us01wembx1.internal.synopsys.com>
On Mon, Jun 03, 2019 at 06:08:35PM +0000, Vineet Gupta wrote:
> On 5/31/19 1:21 AM, Peter Zijlstra wrote:
> >> I'm not sure how to interpret "natural alignment" for the case of double
> >> load/stores on 32-bit systems where the hardware and ABI allow for 4 byte
> >> alignment (ARCv2 LDD/STD, ARM LDRD/STRD ....)
> > Natural alignment: !((uintptr_t)ptr % sizeof(*ptr))
> >
> > For any u64 type, that would give 8 byte alignment. the problem
> > otherwise being that your data spans two lines/pages etc..
>
> Sure, but as Paul said, if the software doesn't expect them to be atomic by
> default, they could span 2 hardware lines to keep the implementation simpler/sane.
I could imagine 8-byte types being only four-byte aligned on 32-bit systems,
but it would be quite a surprise on 64-bit systems.
Thanx, Paul
WARNING: multiple messages have this Message-ID (diff)
From: paulmck@linux.ibm.com (Paul E. McKenney)
To: linux-snps-arc@lists.infradead.org
Subject: single copy atomicity for double load/stores on 32-bit systems
Date: Mon, 3 Jun 2019 13:13:24 -0700 [thread overview]
Message-ID: <20190603201324.GN28207@linux.ibm.com> (raw)
In-Reply-To: <C2D7FE5348E1B147BCA15975FBA2307501A2522B5B@us01wembx1.internal.synopsys.com>
On Mon, Jun 03, 2019@06:08:35PM +0000, Vineet Gupta wrote:
> On 5/31/19 1:21 AM, Peter Zijlstra wrote:
> >> I'm not sure how to interpret "natural alignment" for the case of double
> >> load/stores on 32-bit systems where the hardware and ABI allow for 4 byte
> >> alignment (ARCv2 LDD/STD, ARM LDRD/STRD ....)
> > Natural alignment: !((uintptr_t)ptr % sizeof(*ptr))
> >
> > For any u64 type, that would give 8 byte alignment. the problem
> > otherwise being that your data spans two lines/pages etc..
>
> Sure, but as Paul said, if the software doesn't expect them to be atomic by
> default, they could span 2 hardware lines to keep the implementation simpler/sane.
I could imagine 8-byte types being only four-byte aligned on 32-bit systems,
but it would be quite a surprise on 64-bit systems.
Thanx, Paul
next prev parent reply other threads:[~2019-06-03 20:13 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-30 18:22 single copy atomicity for double load/stores on 32-bit systems Vineet Gupta
2019-05-30 18:22 ` Vineet Gupta
2019-05-30 18:53 ` Paul E. McKenney
2019-05-30 18:53 ` Paul E. McKenney
2019-05-30 19:16 ` Vineet Gupta
2019-05-30 19:16 ` Vineet Gupta
2019-05-31 8:23 ` Peter Zijlstra
2019-05-31 8:23 ` Peter Zijlstra
2019-05-31 8:25 ` Peter Zijlstra
2019-05-31 8:25 ` Peter Zijlstra
2019-05-31 8:21 ` Peter Zijlstra
2019-05-31 8:21 ` Peter Zijlstra
2019-06-03 18:08 ` Vineet Gupta
2019-06-03 18:08 ` Vineet Gupta
2019-06-03 20:13 ` Paul E. McKenney [this message]
2019-06-03 20:13 ` Paul E. McKenney
2019-06-03 21:59 ` Vineet Gupta
2019-06-03 21:59 ` Vineet Gupta
2019-06-04 7:41 ` Geert Uytterhoeven
2019-06-04 7:41 ` Geert Uytterhoeven
2019-06-04 7:41 ` Geert Uytterhoeven
2019-06-06 9:43 ` Paul E. McKenney
2019-06-06 9:43 ` Paul E. McKenney
2019-06-06 9:53 ` Geert Uytterhoeven
2019-06-06 9:53 ` Geert Uytterhoeven
2019-06-06 16:34 ` David Laight
2019-06-06 16:34 ` David Laight
2019-06-06 21:17 ` Paul E. McKenney
2019-06-06 21:17 ` Paul E. McKenney
2019-06-03 18:43 ` Vineet Gupta
2019-06-03 18:43 ` Vineet Gupta
2019-07-01 20:05 ` Vineet Gupta
2019-07-01 20:05 ` Vineet Gupta
2019-07-02 10:46 ` Will Deacon
2019-07-02 10:46 ` Will Deacon
2019-05-31 9:41 ` David Laight
2019-05-31 9:41 ` David Laight
2019-05-31 9:41 ` David Laight
2019-05-31 11:44 ` Paul E. McKenney
2019-05-31 11:44 ` Paul E. McKenney
2019-06-03 18:44 ` Vineet Gupta
2019-06-03 18:44 ` Vineet Gupta
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