From: "Clément Péron" <peron.clem@gmail.com>
To: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@googlegroups.com,
"Clément Péron" <peron.clem@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-media@vger.kernel.org
Subject: [PATCH v5 04/13] media: rc: sunxi: Add RXSTA bits definition
Date: Sat, 8 Jun 2019 01:10:51 +0200 [thread overview]
Message-ID: <20190607231100.5894-5-peron.clem@gmail.com> (raw)
In-Reply-To: <20190607231100.5894-1-peron.clem@gmail.com>
We are using RXINT bits definition when looking at RXSTA register.
These bits are equal but it's not really proper.
Introduce the RXSTA bits and use them to have coherency.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
drivers/media/rc/sunxi-cir.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 0504ebfc831f..5690d0bd51bc 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -48,11 +48,11 @@
/* Rx Interrupt Enable */
#define SUNXI_IR_RXINT_REG 0x2C
-/* Rx FIFO Overflow */
+/* Rx FIFO Overflow Interrupt Enable */
#define REG_RXINT_ROI_EN BIT(0)
-/* Rx Packet End */
+/* Rx Packet End Interrupt Enable */
#define REG_RXINT_RPEI_EN BIT(1)
-/* Rx FIFO Data Available */
+/* Rx FIFO Data Available Interrupt Enable */
#define REG_RXINT_RAI_EN BIT(4)
/* Rx FIFO available byte level */
@@ -60,6 +60,12 @@
/* Rx Interrupt Status */
#define SUNXI_IR_RXSTA_REG 0x30
+/* Rx FIFO Overflow */
+#define REG_RXSTA_ROI REG_RXINT_ROI_EN
+/* Rx Packet End */
+#define REG_RXSTA_RPE REG_RXINT_RPEI_EN
+/* Rx FIFO Data Available */
+#define REG_RXSTA_RA REG_RXINT_RAI_EN
/* RX FIFO Get Available Counter */
#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
/* Clear all interrupt status value */
@@ -119,7 +125,7 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
/* clean all pending statuses */
writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
- if (status & (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
+ if (status & (REG_RXSTA_RA | REG_RXSTA_RPE)) {
/* How many messages in fifo */
rc = REG_RXSTA_GET_AC(status);
/* Sanity check */
@@ -135,9 +141,9 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
}
}
- if (status & REG_RXINT_ROI_EN) {
+ if (status & REG_RXSTA_ROI) {
ir_raw_event_reset(ir->rc);
- } else if (status & REG_RXINT_RPEI_EN) {
+ } else if (status & REG_RXSTA_RPE) {
ir_raw_event_set_idle(ir->rc, true);
ir_raw_event_handle(ir->rc);
}
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: "Clément Péron" <peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Mauro Carvalho Chehab
<mchehab-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Maxime Ripard
<maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
"Clément Péron"
<peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: [PATCH v5 04/13] media: rc: sunxi: Add RXSTA bits definition
Date: Sat, 8 Jun 2019 01:10:51 +0200 [thread overview]
Message-ID: <20190607231100.5894-5-peron.clem@gmail.com> (raw)
In-Reply-To: <20190607231100.5894-1-peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
We are using RXINT bits definition when looking at RXSTA register.
These bits are equal but it's not really proper.
Introduce the RXSTA bits and use them to have coherency.
Signed-off-by: Clément Péron <peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/media/rc/sunxi-cir.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 0504ebfc831f..5690d0bd51bc 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -48,11 +48,11 @@
/* Rx Interrupt Enable */
#define SUNXI_IR_RXINT_REG 0x2C
-/* Rx FIFO Overflow */
+/* Rx FIFO Overflow Interrupt Enable */
#define REG_RXINT_ROI_EN BIT(0)
-/* Rx Packet End */
+/* Rx Packet End Interrupt Enable */
#define REG_RXINT_RPEI_EN BIT(1)
-/* Rx FIFO Data Available */
+/* Rx FIFO Data Available Interrupt Enable */
#define REG_RXINT_RAI_EN BIT(4)
/* Rx FIFO available byte level */
@@ -60,6 +60,12 @@
/* Rx Interrupt Status */
#define SUNXI_IR_RXSTA_REG 0x30
+/* Rx FIFO Overflow */
+#define REG_RXSTA_ROI REG_RXINT_ROI_EN
+/* Rx Packet End */
+#define REG_RXSTA_RPE REG_RXINT_RPEI_EN
+/* Rx FIFO Data Available */
+#define REG_RXSTA_RA REG_RXINT_RAI_EN
/* RX FIFO Get Available Counter */
#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
/* Clear all interrupt status value */
@@ -119,7 +125,7 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
/* clean all pending statuses */
writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
- if (status & (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
+ if (status & (REG_RXSTA_RA | REG_RXSTA_RPE)) {
/* How many messages in fifo */
rc = REG_RXSTA_GET_AC(status);
/* Sanity check */
@@ -135,9 +141,9 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
}
}
- if (status & REG_RXINT_ROI_EN) {
+ if (status & REG_RXSTA_ROI) {
ir_raw_event_reset(ir->rc);
- } else if (status & REG_RXINT_RPEI_EN) {
+ } else if (status & REG_RXSTA_RPE) {
ir_raw_event_set_idle(ir->rc, true);
ir_raw_event_handle(ir->rc);
}
--
2.20.1
--
You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org
To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20190607231100.5894-5-peron.clem%40gmail.com.
For more options, visit https://groups.google.com/d/optout.
WARNING: multiple messages have this Message-ID (diff)
From: "Clément Péron" <peron.clem@gmail.com>
To: Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@googlegroups.com,
linux-arm-kernel@lists.infradead.org,
linux-media@vger.kernel.org,
"Clément Péron" <peron.clem@gmail.com>
Subject: [PATCH v5 04/13] media: rc: sunxi: Add RXSTA bits definition
Date: Sat, 8 Jun 2019 01:10:51 +0200 [thread overview]
Message-ID: <20190607231100.5894-5-peron.clem@gmail.com> (raw)
In-Reply-To: <20190607231100.5894-1-peron.clem@gmail.com>
We are using RXINT bits definition when looking at RXSTA register.
These bits are equal but it's not really proper.
Introduce the RXSTA bits and use them to have coherency.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
drivers/media/rc/sunxi-cir.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 0504ebfc831f..5690d0bd51bc 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -48,11 +48,11 @@
/* Rx Interrupt Enable */
#define SUNXI_IR_RXINT_REG 0x2C
-/* Rx FIFO Overflow */
+/* Rx FIFO Overflow Interrupt Enable */
#define REG_RXINT_ROI_EN BIT(0)
-/* Rx Packet End */
+/* Rx Packet End Interrupt Enable */
#define REG_RXINT_RPEI_EN BIT(1)
-/* Rx FIFO Data Available */
+/* Rx FIFO Data Available Interrupt Enable */
#define REG_RXINT_RAI_EN BIT(4)
/* Rx FIFO available byte level */
@@ -60,6 +60,12 @@
/* Rx Interrupt Status */
#define SUNXI_IR_RXSTA_REG 0x30
+/* Rx FIFO Overflow */
+#define REG_RXSTA_ROI REG_RXINT_ROI_EN
+/* Rx Packet End */
+#define REG_RXSTA_RPE REG_RXINT_RPEI_EN
+/* Rx FIFO Data Available */
+#define REG_RXSTA_RA REG_RXINT_RAI_EN
/* RX FIFO Get Available Counter */
#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
/* Clear all interrupt status value */
@@ -119,7 +125,7 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
/* clean all pending statuses */
writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
- if (status & (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
+ if (status & (REG_RXSTA_RA | REG_RXSTA_RPE)) {
/* How many messages in fifo */
rc = REG_RXSTA_GET_AC(status);
/* Sanity check */
@@ -135,9 +141,9 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
}
}
- if (status & REG_RXINT_ROI_EN) {
+ if (status & REG_RXSTA_ROI) {
ir_raw_event_reset(ir->rc);
- } else if (status & REG_RXINT_RPEI_EN) {
+ } else if (status & REG_RXSTA_RPE) {
ir_raw_event_set_idle(ir->rc, true);
ir_raw_event_handle(ir->rc);
}
--
2.20.1
next prev parent reply other threads:[~2019-06-07 23:12 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-07 23:10 [PATCH v5 00/13] Allwinner A64/H6 IR support Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` [PATCH v5 01/13] dt-bindings: media: sunxi-ir: Add A31 compatible Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-07-09 2:07 ` Rob Herring
2019-07-09 2:07 ` Rob Herring
2019-07-09 2:07 ` Rob Herring
2019-06-07 23:10 ` [PATCH v5 02/13] media: rc: Introduce sunxi_ir_quirks Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` [PATCH v5 03/13] media: rc: sunxi: Add A31 compatible Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron [this message]
2019-06-07 23:10 ` [PATCH v5 04/13] media: rc: sunxi: Add RXSTA bits definition Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-10 9:52 ` Maxime Ripard
2019-06-10 9:52 ` Maxime Ripard
2019-06-10 9:52 ` Maxime Ripard
2019-07-14 14:32 ` Clément Péron
2019-07-14 14:32 ` Clément Péron
2019-07-14 14:32 ` Clément Péron
2019-07-15 12:12 ` Sean Young
2019-07-15 12:12 ` Sean Young
2019-07-23 6:25 ` Sean Young
2019-07-23 6:25 ` Sean Young
2019-07-23 7:04 ` Maxime Ripard
2019-07-23 7:04 ` Maxime Ripard
2019-07-23 7:04 ` Maxime Ripard
2019-07-24 5:39 ` Sean Young
2019-07-24 5:39 ` Sean Young
2019-07-24 5:39 ` Sean Young
2019-07-24 8:24 ` Maxime Ripard
2019-07-24 8:24 ` Maxime Ripard
2019-07-24 8:24 ` Maxime Ripard
2019-06-07 23:10 ` [PATCH v5 05/13] ARM: dts: sunxi: Prefer A31 bindings for IR Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` [PATCH v5 06/13] " Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` [PATCH v5 07/13] dt-bindings: media: sunxi-ir: Add A64 compatible Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-07-09 2:08 ` Rob Herring
2019-07-09 2:08 ` Rob Herring
2019-07-09 2:08 ` Rob Herring
2019-06-07 23:10 ` [PATCH v5 08/13] arm64: dts: allwinner: a64: Add IR node Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` [PATCH v5 09/13] arm64: dts: allwinner: a64: Enable IR on Orange Pi Win Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` [PATCH v5 10/13] dt-bindings: media: sunxi-ir: Add H6 compatible Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-07-09 2:08 ` Rob Herring
2019-07-09 2:08 ` Rob Herring
2019-07-09 2:08 ` Rob Herring
2019-06-07 23:10 ` [PATCH v5 11/13] arm64: dts: allwinner: h6: Add IR receiver node Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` [PATCH v5 12/13] arm64: dts: allwinner: h6: Enable IR on H6 boards Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:10 ` Clément Péron
2019-06-07 23:11 ` [PATCH v5 13/13] arm64: defconfig: Enable IR SUNXI option Clément Péron
2019-06-07 23:11 ` Clément Péron
2019-06-07 23:11 ` Clément Péron
2019-07-22 18:48 ` [PATCH v5 00/13] Allwinner A64/H6 IR support Clément Péron
2019-07-22 18:48 ` Clément Péron
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190607231100.5894-5-peron.clem@gmail.com \
--to=peron.clem@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=mark.rutland@arm.com \
--cc=maxime.ripard@bootlin.com \
--cc=mchehab@kernel.org \
--cc=robh+dt@kernel.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.