[PATCH v2 0/6] Display uncore prep patches

[PATCH v2 0/6] Display uncore prep patches

[Daniele Ceraolo Spurio]

main changes are the removal of the _forcewake_ suspend/resume calls and
the updated logic for the dynamic allocation of fw domains.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>

Daniele Ceraolo Spurio (6):
  drm/i915: use vfuncs for reg_read/write_fw_domains
  drm/i915: kill uncore_sanitize
  drm/i915: kill uncore_to_i915
  drm/i915: skip forcewake actions on forcewake-less uncore
  drm/i915: dynamically allocate forcewake domains
  drm/i915/gvt: decouple check_vgpu() from uncore_init()

 drivers/gpu/drm/i915/i915_drv.c              |  16 +-
 drivers/gpu/drm/i915/i915_drv.h              |   5 -
 drivers/gpu/drm/i915/i915_pvinfo.h           |   5 +-
 drivers/gpu/drm/i915/i915_vgpu.c             |  35 +-
 drivers/gpu/drm/i915/i915_vgpu.h             |   2 +-
 drivers/gpu/drm/i915/intel_uncore.c          | 425 ++++++++++---------
 drivers/gpu/drm/i915/intel_uncore.h          |  23 +-
 drivers/gpu/drm/i915/selftests/mock_uncore.c |   4 +-
 8 files changed, 285 insertions(+), 230 deletions(-)

-- 
2.20.1

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[PATCH v2 1/6] drm/i915: use vfuncs for reg_read/write_fw_domains

[Daniele Ceraolo Spurio]

Instead of going through the if-else chain every time, let's save the
function in the uncore structure. Note that the new functions are
purposely not used from the reg read/write functions to keep the
inlining there.

While at it, use the new macro to call the old ones to clean the code a
bit.

v2: Rename macros for no-forcewake function assignment (Tvrtko)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c          | 172 ++++++++-----------
 drivers/gpu/drm/i915/intel_uncore.h          |   5 +
 drivers/gpu/drm/i915/selftests/mock_uncore.c |   4 +-
 3 files changed, 75 insertions(+), 106 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index da33aa672c3d..8e5716bc53e2 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -901,6 +901,12 @@ static bool is_gen##x##_shadowed(u32 offset) \
 __is_genX_shadowed(8)
 __is_genX_shadowed(11)
 
+static enum forcewake_domains
+gen6_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg)
+{
+	return FORCEWAKE_RENDER;
+}
+
 #define __gen8_reg_write_fw_domains(uncore, offset) \
 ({ \
 	enum forcewake_domains __fwd; \
@@ -1145,26 +1151,23 @@ func##_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
 	val = __raw_uncore_read##x(uncore, reg); \
 	GEN6_READ_FOOTER; \
 }
-#define __gen6_read(x) __gen_read(gen6, x)
-#define __fwtable_read(x) __gen_read(fwtable, x)
-#define __gen11_fwtable_read(x) __gen_read(gen11_fwtable, x)
-
-__gen11_fwtable_read(8)
-__gen11_fwtable_read(16)
-__gen11_fwtable_read(32)
-__gen11_fwtable_read(64)
-__fwtable_read(8)
-__fwtable_read(16)
-__fwtable_read(32)
-__fwtable_read(64)
-__gen6_read(8)
-__gen6_read(16)
-__gen6_read(32)
-__gen6_read(64)
-
-#undef __gen11_fwtable_read
-#undef __fwtable_read
-#undef __gen6_read
+
+#define __gen_reg_read_funcs(func) \
+static enum forcewake_domains \
+func##_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
+	return __##func##_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
+} \
+\
+__gen_read(func, 8) \
+__gen_read(func, 16) \
+__gen_read(func, 32) \
+__gen_read(func, 64)
+
+__gen_reg_read_funcs(gen11_fwtable);
+__gen_reg_read_funcs(fwtable);
+__gen_reg_read_funcs(gen6);
+
+#undef __gen_reg_read_funcs
 #undef GEN6_READ_FOOTER
 #undef GEN6_READ_HEADER
 
@@ -1225,6 +1228,9 @@ gen6_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace)
 	__raw_uncore_write##x(uncore, reg, val); \
 	GEN6_WRITE_FOOTER; \
 }
+__gen6_write(8)
+__gen6_write(16)
+__gen6_write(32)
 
 #define __gen_write(func, x) \
 static void \
@@ -1237,38 +1243,33 @@ func##_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trac
 	__raw_uncore_write##x(uncore, reg, val); \
 	GEN6_WRITE_FOOTER; \
 }
-#define __gen8_write(x) __gen_write(gen8, x)
-#define __fwtable_write(x) __gen_write(fwtable, x)
-#define __gen11_fwtable_write(x) __gen_write(gen11_fwtable, x)
-
-__gen11_fwtable_write(8)
-__gen11_fwtable_write(16)
-__gen11_fwtable_write(32)
-__fwtable_write(8)
-__fwtable_write(16)
-__fwtable_write(32)
-__gen8_write(8)
-__gen8_write(16)
-__gen8_write(32)
-__gen6_write(8)
-__gen6_write(16)
-__gen6_write(32)
 
-#undef __gen11_fwtable_write
-#undef __fwtable_write
-#undef __gen8_write
-#undef __gen6_write
+#define __gen_reg_write_funcs(func) \
+static enum forcewake_domains \
+func##_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
+	return __##func##_reg_write_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
+} \
+\
+__gen_write(func, 8) \
+__gen_write(func, 16) \
+__gen_write(func, 32)
+
+__gen_reg_write_funcs(gen11_fwtable);
+__gen_reg_write_funcs(fwtable);
+__gen_reg_write_funcs(gen8);
+
+#undef __gen_reg_write_funcs
 #undef GEN6_WRITE_FOOTER
 #undef GEN6_WRITE_HEADER
 
-#define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \
+#define ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, x) \
 do { \
 	(uncore)->funcs.mmio_writeb = x##_write8; \
 	(uncore)->funcs.mmio_writew = x##_write16; \
 	(uncore)->funcs.mmio_writel = x##_write32; \
 } while (0)
 
-#define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \
+#define ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x) \
 do { \
 	(uncore)->funcs.mmio_readb = x##_read8; \
 	(uncore)->funcs.mmio_readw = x##_read16; \
@@ -1276,6 +1277,17 @@ do { \
 	(uncore)->funcs.mmio_readq = x##_read64; \
 } while (0)
 
+#define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \
+do { \
+	ASSIGN_RAW_WRITE_MMIO_VFUNCS((uncore), x); \
+	(uncore)->funcs.write_fw_domains = x##_reg_write_fw_domains; \
+} while (0)
+
+#define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \
+do { \
+	ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x); \
+	(uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \
+} while (0)
 
 static void fw_domain_init(struct intel_uncore *uncore,
 			   enum forcewake_domain_id domain_id,
@@ -1559,11 +1571,11 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 
 	if (!intel_uncore_has_forcewake(uncore)) {
 		if (IS_GEN(i915, 5)) {
-			ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen5);
-			ASSIGN_READ_MMIO_VFUNCS(uncore, gen5);
+			ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
+			ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
 		} else {
-			ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen2);
-			ASSIGN_READ_MMIO_VFUNCS(uncore, gen2);
+			ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen2);
+			ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen2);
 		}
 	} else if (IS_GEN_RANGE(i915, 6, 7)) {
 		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
@@ -1594,6 +1606,12 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
 	}
 
+	/* make sure fw funcs are set if and only if we have fw*/
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_get);
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_put);
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.read_fw_domains);
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.write_fw_domains);
+
 	if (HAS_FPGA_DBG_UNCLAIMED(i915))
 		uncore->flags |= UNCORE_HAS_FPGA_DBG_UNCLAIMED;
 
@@ -1871,62 +1889,6 @@ intel_uncore_arm_unclaimed_mmio_detection(struct intel_uncore *uncore)
 	return ret;
 }
 
-static enum forcewake_domains
-intel_uncore_forcewake_for_read(struct intel_uncore *uncore,
-				i915_reg_t reg)
-{
-	struct drm_i915_private *i915 = uncore_to_i915(uncore);
-	u32 offset = i915_mmio_reg_offset(reg);
-	enum forcewake_domains fw_domains;
-
-	if (INTEL_GEN(i915) >= 11) {
-		fw_domains = __gen11_fwtable_reg_read_fw_domains(uncore, offset);
-	} else if (HAS_FWTABLE(i915)) {
-		fw_domains = __fwtable_reg_read_fw_domains(uncore, offset);
-	} else if (INTEL_GEN(i915) >= 6) {
-		fw_domains = __gen6_reg_read_fw_domains(uncore, offset);
-	} else {
-		/* on devices with FW we expect to hit one of the above cases */
-		if (intel_uncore_has_forcewake(uncore))
-			MISSING_CASE(INTEL_GEN(i915));
-
-		fw_domains = 0;
-	}
-
-	WARN_ON(fw_domains & ~uncore->fw_domains);
-
-	return fw_domains;
-}
-
-static enum forcewake_domains
-intel_uncore_forcewake_for_write(struct intel_uncore *uncore,
-				 i915_reg_t reg)
-{
-	struct drm_i915_private *i915 = uncore_to_i915(uncore);
-	u32 offset = i915_mmio_reg_offset(reg);
-	enum forcewake_domains fw_domains;
-
-	if (INTEL_GEN(i915) >= 11) {
-		fw_domains = __gen11_fwtable_reg_write_fw_domains(uncore, offset);
-	} else if (HAS_FWTABLE(i915) && !IS_VALLEYVIEW(i915)) {
-		fw_domains = __fwtable_reg_write_fw_domains(uncore, offset);
-	} else if (IS_GEN(i915, 8)) {
-		fw_domains = __gen8_reg_write_fw_domains(uncore, offset);
-	} else if (IS_GEN_RANGE(i915, 6, 7)) {
-		fw_domains = FORCEWAKE_RENDER;
-	} else {
-		/* on devices with FW we expect to hit one of the above cases */
-		if (intel_uncore_has_forcewake(uncore))
-			MISSING_CASE(INTEL_GEN(i915));
-
-		fw_domains = 0;
-	}
-
-	WARN_ON(fw_domains & ~uncore->fw_domains);
-
-	return fw_domains;
-}
-
 /**
  * intel_uncore_forcewake_for_reg - which forcewake domains are needed to access
  * 				    a register
@@ -1953,10 +1915,12 @@ intel_uncore_forcewake_for_reg(struct intel_uncore *uncore,
 		return 0;
 
 	if (op & FW_REG_READ)
-		fw_domains = intel_uncore_forcewake_for_read(uncore, reg);
+		fw_domains = uncore->funcs.read_fw_domains(uncore, reg);
 
 	if (op & FW_REG_WRITE)
-		fw_domains |= intel_uncore_forcewake_for_write(uncore, reg);
+		fw_domains |= uncore->funcs.write_fw_domains(uncore, reg);
+
+	WARN_ON(fw_domains & ~uncore->fw_domains);
 
 	return fw_domains;
 }
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index 804a0faacc91..4afde0c44ffe 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -70,6 +70,11 @@ struct intel_uncore_funcs {
 	void (*force_wake_put)(struct intel_uncore *uncore,
 			       enum forcewake_domains domains);
 
+	enum forcewake_domains (*read_fw_domains)(struct intel_uncore *uncore,
+						  i915_reg_t r);
+	enum forcewake_domains (*write_fw_domains)(struct intel_uncore *uncore,
+						   i915_reg_t r);
+
 	u8 (*mmio_readb)(struct intel_uncore *uncore,
 			 i915_reg_t r, bool trace);
 	u16 (*mmio_readw)(struct intel_uncore *uncore,
diff --git a/drivers/gpu/drm/i915/selftests/mock_uncore.c b/drivers/gpu/drm/i915/selftests/mock_uncore.c
index ff8999c63a12..49585f16d4a2 100644
--- a/drivers/gpu/drm/i915/selftests/mock_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/mock_uncore.c
@@ -41,6 +41,6 @@ __nop_read(64)
 
 void mock_uncore_init(struct intel_uncore *uncore)
 {
-	ASSIGN_WRITE_MMIO_VFUNCS(uncore, nop);
-	ASSIGN_READ_MMIO_VFUNCS(uncore, nop);
+	ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, nop);
+	ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, nop);
 }
-- 
2.20.1

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[PATCH v2 2/6] drm/i915: kill uncore_sanitize

[Daniele Ceraolo Spurio]

uncore_sanitize performs no action on the uncore structure and just
calls intel_sanitize_gt_powersave, so we can just call the latter
directly.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c     | 12 ++++++++++--
 drivers/gpu/drm/i915/intel_uncore.c |  9 ---------
 drivers/gpu/drm/i915/intel_uncore.h |  1 -
 3 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f62e3397d936..458784fd556e 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1629,7 +1629,8 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
 	pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY,
 			   PM_QOS_DEFAULT_VALUE);
 
-	intel_uncore_sanitize(dev_priv);
+	/* BIOS often leaves RC6 enabled, but disable it for hw init */
+	intel_sanitize_gt_powersave(dev_priv);
 
 	intel_gt_init_workarounds(dev_priv);
 
@@ -1921,6 +1922,9 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 out_cleanup_hw:
 	i915_driver_cleanup_hw(dev_priv);
 	i915_ggtt_cleanup_hw(dev_priv);
+
+	/* Paranoia: make sure we have disabled everything before we exit. */
+	intel_sanitize_gt_powersave(dev_priv);
 out_cleanup_mmio:
 	i915_driver_cleanup_mmio(dev_priv);
 out_runtime_pm_put:
@@ -1991,6 +1995,10 @@ static void i915_driver_release(struct drm_device *dev)
 	i915_gem_fini(dev_priv);
 
 	i915_ggtt_cleanup_hw(dev_priv);
+
+	/* Paranoia: make sure we have disabled everything before we exit. */
+	intel_sanitize_gt_powersave(dev_priv);
+
 	i915_driver_cleanup_mmio(dev_priv);
 
 	enable_rpm_wakeref_asserts(rpm);
@@ -2357,7 +2365,7 @@ static int i915_drm_resume_early(struct drm_device *dev)
 		hsw_disable_pc8(dev_priv);
 	}
 
-	intel_uncore_sanitize(dev_priv);
+	intel_sanitize_gt_powersave(dev_priv);
 
 	intel_power_domains_resume(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 8e5716bc53e2..63bdadacadcc 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -537,12 +537,6 @@ void intel_uncore_runtime_resume(struct intel_uncore *uncore)
 	iosf_mbi_register_pmic_bus_access_notifier(&uncore->pmic_bus_access_nb);
 }
 
-void intel_uncore_sanitize(struct drm_i915_private *dev_priv)
-{
-	/* BIOS often leaves RC6 enabled, but disable it for hw init */
-	intel_sanitize_gt_powersave(dev_priv);
-}
-
 static void __intel_uncore_forcewake_get(struct intel_uncore *uncore,
 					 enum forcewake_domains fw_domains)
 {
@@ -1664,9 +1658,6 @@ void intel_uncore_prune_mmio_domains(struct intel_uncore *uncore)
 
 void intel_uncore_fini_mmio(struct intel_uncore *uncore)
 {
-	/* Paranoia: make sure we have disabled everything before we exit. */
-	intel_uncore_sanitize(uncore_to_i915(uncore));
-
 	iosf_mbi_punit_acquire();
 	iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
 		&uncore->pmic_bus_access_nb);
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index 4afde0c44ffe..94c00d3778b1 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -182,7 +182,6 @@ intel_uncore_has_fifo(const struct intel_uncore *uncore)
 	return uncore->flags & UNCORE_HAS_FIFO;
 }
 
-void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
 void intel_uncore_init_early(struct intel_uncore *uncore);
 int intel_uncore_init_mmio(struct intel_uncore *uncore);
 void intel_uncore_prune_mmio_domains(struct intel_uncore *uncore);
-- 
2.20.1

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[PATCH v2 3/6] drm/i915: kill uncore_to_i915

[Daniele Ceraolo Spurio]

Let's get rid of it before it proliferates, since with split GT/Display
uncores the container_of won't work anymore.

I've kept the rpm pointer as well to minimize the pointer chasing in the
MMIO accessors.

v2: swap parameter order for intel_uncore_init_early (Tvrtko)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c     |  2 +-
 drivers/gpu/drm/i915/i915_drv.h     |  5 -----
 drivers/gpu/drm/i915/intel_uncore.c | 24 ++++++++++++------------
 drivers/gpu/drm/i915/intel_uncore.h |  4 +++-
 4 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 458784fd556e..00b6512cdee6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -900,7 +900,7 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv)
 
 	intel_device_info_subplatform_init(dev_priv);
 
-	intel_uncore_init_early(&dev_priv->uncore);
+	intel_uncore_init_early(&dev_priv->uncore, dev_priv);
 
 	spin_lock_init(&dev_priv->irq_lock);
 	spin_lock_init(&dev_priv->gpu_error.lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bc909ec5d9c3..2734f62ab19a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1950,11 +1950,6 @@ static inline struct drm_i915_private *huc_to_i915(struct intel_huc *huc)
 	return container_of(huc, struct drm_i915_private, huc);
 }
 
-static inline struct drm_i915_private *uncore_to_i915(struct intel_uncore *uncore)
-{
-	return container_of(uncore, struct drm_i915_private, uncore);
-}
-
 /* Simple iterator over all initialised engines */
 #define for_each_engine(engine__, dev_priv__, id__) \
 	for ((id__) = 0; \
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 63bdadacadcc..59cb258312a2 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -322,7 +322,7 @@ static void __gen6_gt_wait_for_fifo(struct intel_uncore *uncore)
 
 	/* On VLV, FIFO will be shared by both SW and HW.
 	 * So, we need to read the FREE_ENTRIES everytime */
-	if (IS_VALLEYVIEW(uncore_to_i915(uncore)))
+	if (IS_VALLEYVIEW(uncore->i915))
 		n = fifo_free_entries(uncore);
 	else
 		n = uncore->fifo_count;
@@ -493,7 +493,7 @@ static void __intel_uncore_early_sanitize(struct intel_uncore *uncore,
 		DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n");
 
 	/* WaDisableShadowRegForCpd:chv */
-	if (IS_CHERRYVIEW(uncore_to_i915(uncore))) {
+	if (IS_CHERRYVIEW(uncore->i915)) {
 		__raw_uncore_write32(uncore, GTFIFOCTL,
 				     __raw_uncore_read32(uncore, GTFIFOCTL) |
 				     GT_FIFO_CTL_BLOCK_ALL_POLICY_STALL |
@@ -622,7 +622,7 @@ void intel_uncore_forcewake_user_put(struct intel_uncore *uncore)
 	spin_lock_irq(&uncore->lock);
 	if (!--uncore->user_forcewake.count) {
 		if (intel_uncore_unclaimed_mmio(uncore))
-			dev_info(uncore_to_i915(uncore)->drm.dev,
+			dev_info(uncore->i915->drm.dev,
 				 "Invalid mmio detected during user access\n");
 
 		uncore->unclaimed_mmio_check =
@@ -1346,7 +1346,7 @@ static void fw_domain_fini(struct intel_uncore *uncore,
 
 static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 {
-	struct drm_i915_private *i915 = uncore_to_i915(uncore);
+	struct drm_i915_private *i915 = uncore->i915;
 
 	if (!intel_uncore_has_forcewake(uncore))
 		return;
@@ -1499,7 +1499,7 @@ static int i915_pmic_bus_access_notifier(struct notifier_block *nb,
 
 static int uncore_mmio_setup(struct intel_uncore *uncore)
 {
-	struct drm_i915_private *i915 = uncore_to_i915(uncore);
+	struct drm_i915_private *i915 = uncore->i915;
 	struct pci_dev *pdev = i915->drm.pdev;
 	int mmio_bar;
 	int mmio_size;
@@ -1529,20 +1529,22 @@ static int uncore_mmio_setup(struct intel_uncore *uncore)
 
 static void uncore_mmio_cleanup(struct intel_uncore *uncore)
 {
-	struct drm_i915_private *i915 = uncore_to_i915(uncore);
-	struct pci_dev *pdev = i915->drm.pdev;
+	struct pci_dev *pdev = uncore->i915->drm.pdev;
 
 	pci_iounmap(pdev, uncore->regs);
 }
 
-void intel_uncore_init_early(struct intel_uncore *uncore)
+void intel_uncore_init_early(struct intel_uncore *uncore,
+			     struct drm_i915_private *i915)
 {
 	spin_lock_init(&uncore->lock);
+	uncore->i915 = i915;
+	uncore->rpm = &i915->runtime_pm;
 }
 
 int intel_uncore_init_mmio(struct intel_uncore *uncore)
 {
-	struct drm_i915_private *i915 = uncore_to_i915(uncore);
+	struct drm_i915_private *i915 = uncore->i915;
 	int ret;
 
 	ret = uncore_mmio_setup(uncore);
@@ -1561,8 +1563,6 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 	uncore->pmic_bus_access_nb.notifier_call =
 		i915_pmic_bus_access_notifier;
 
-	uncore->rpm = &i915->runtime_pm;
-
 	if (!intel_uncore_has_forcewake(uncore)) {
 		if (IS_GEN(i915, 5)) {
 			ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
@@ -1627,7 +1627,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
  */
 void intel_uncore_prune_mmio_domains(struct intel_uncore *uncore)
 {
-	struct drm_i915_private *i915 = uncore_to_i915(uncore);
+	struct drm_i915_private *i915 = uncore->i915;
 
 	if (INTEL_GEN(i915) >= 11) {
 		enum forcewake_domains fw_domains = uncore->fw_domains;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index 94c00d3778b1..59505a2f9097 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -102,6 +102,7 @@ struct intel_forcewake_range {
 struct intel_uncore {
 	void __iomem *regs;
 
+	struct drm_i915_private *i915;
 	struct intel_runtime_pm *rpm;
 
 	spinlock_t lock; /** lock is also taken in irq contexts. */
@@ -182,7 +183,8 @@ intel_uncore_has_fifo(const struct intel_uncore *uncore)
 	return uncore->flags & UNCORE_HAS_FIFO;
 }
 
-void intel_uncore_init_early(struct intel_uncore *uncore);
+void intel_uncore_init_early(struct intel_uncore *uncore,
+			     struct drm_i915_private *i915);
 int intel_uncore_init_mmio(struct intel_uncore *uncore);
 void intel_uncore_prune_mmio_domains(struct intel_uncore *uncore);
 bool intel_uncore_unclaimed_mmio(struct intel_uncore *uncore);
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v2 4/6] drm/i915: skip forcewake actions on forcewake-less uncore

[Daniele Ceraolo Spurio]

We always call some of the setup/cleanup functions for forcewake, even
if the feature is not actually available. Skipping these operations if
forcewake is not available saves us some operations on older gens and
prepares us for having a forcewake-less display uncore.

v2: do not make suspend/resume functions forcewake-specific (Chris,
Tvrtko), use GEM_BUG_ON in internal forcewake-only functions (Tvrtko)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 143 +++++++++++++++++-----------
 1 file changed, 87 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 59cb258312a2..00bf5e085a2c 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -485,12 +485,10 @@ check_for_unclaimed_mmio(struct intel_uncore *uncore)
 	return ret;
 }
 
-static void __intel_uncore_early_sanitize(struct intel_uncore *uncore,
-					  unsigned int restore_forcewake)
+static void forcewake_early_sanitize(struct intel_uncore *uncore,
+				     unsigned int restore_forcewake)
 {
-	/* clear out unclaimed reg detection bit */
-	if (check_for_unclaimed_mmio(uncore))
-		DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n");
+	GEM_BUG_ON(!intel_uncore_has_forcewake(uncore));
 
 	/* WaDisableShadowRegForCpd:chv */
 	if (IS_CHERRYVIEW(uncore->i915)) {
@@ -515,6 +513,9 @@ static void __intel_uncore_early_sanitize(struct intel_uncore *uncore,
 
 void intel_uncore_suspend(struct intel_uncore *uncore)
 {
+	if (!intel_uncore_has_forcewake(uncore))
+		return;
+
 	iosf_mbi_punit_acquire();
 	iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
 		&uncore->pmic_bus_access_nb);
@@ -526,14 +527,23 @@ void intel_uncore_resume_early(struct intel_uncore *uncore)
 {
 	unsigned int restore_forcewake;
 
+	if (intel_uncore_unclaimed_mmio(uncore))
+		DRM_DEBUG("unclaimed mmio detected on resume, clearing\n");
+
+	if (!intel_uncore_has_forcewake(uncore))
+		return;
+
 	restore_forcewake = fetch_and_zero(&uncore->fw_domains_saved);
-	__intel_uncore_early_sanitize(uncore, restore_forcewake);
+	forcewake_early_sanitize(uncore, restore_forcewake);
 
 	iosf_mbi_register_pmic_bus_access_notifier(&uncore->pmic_bus_access_nb);
 }
 
 void intel_uncore_runtime_resume(struct intel_uncore *uncore)
 {
+	if (!intel_uncore_has_forcewake(uncore))
+		return;
+
 	iosf_mbi_register_pmic_bus_access_notifier(&uncore->pmic_bus_access_nb);
 }
 
@@ -1348,8 +1358,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 {
 	struct drm_i915_private *i915 = uncore->i915;
 
-	if (!intel_uncore_has_forcewake(uncore))
-		return;
+	GEM_BUG_ON(!intel_uncore_has_forcewake(uncore));
 
 	if (INTEL_GEN(i915) >= 11) {
 		int i;
@@ -1542,36 +1551,29 @@ void intel_uncore_init_early(struct intel_uncore *uncore,
 	uncore->rpm = &i915->runtime_pm;
 }
 
-int intel_uncore_init_mmio(struct intel_uncore *uncore)
+static void uncore_raw_init(struct intel_uncore *uncore)
 {
-	struct drm_i915_private *i915 = uncore->i915;
-	int ret;
+	GEM_BUG_ON(intel_uncore_has_forcewake(uncore));
 
-	ret = uncore_mmio_setup(uncore);
-	if (ret)
-		return ret;
+	if (IS_GEN(uncore->i915, 5)) {
+		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
+		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
+	} else {
+		ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen2);
+		ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen2);
+	}
+}
 
-	i915_check_vgpu(i915);
+static void uncore_forcewake_init(struct intel_uncore *uncore)
+{
+	struct drm_i915_private *i915 = uncore->i915;
 
-	if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
-		uncore->flags |= UNCORE_HAS_FORCEWAKE;
+	GEM_BUG_ON(!intel_uncore_has_forcewake(uncore));
 
 	intel_uncore_fw_domains_init(uncore);
-	__intel_uncore_early_sanitize(uncore, 0);
-
-	uncore->unclaimed_mmio_check = 1;
-	uncore->pmic_bus_access_nb.notifier_call =
-		i915_pmic_bus_access_notifier;
+	forcewake_early_sanitize(uncore, 0);
 
-	if (!intel_uncore_has_forcewake(uncore)) {
-		if (IS_GEN(i915, 5)) {
-			ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
-			ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
-		} else {
-			ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen2);
-			ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen2);
-		}
-	} else if (IS_GEN_RANGE(i915, 6, 7)) {
+	if (IS_GEN_RANGE(i915, 6, 7)) {
 		ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
 
 		if (IS_VALLEYVIEW(i915)) {
@@ -1585,7 +1587,6 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 			ASSIGN_FW_DOMAINS_TABLE(uncore, __chv_fw_ranges);
 			ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
 			ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
-
 		} else {
 			ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen8);
 			ASSIGN_READ_MMIO_VFUNCS(uncore, gen6);
@@ -1600,6 +1601,31 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
 	}
 
+	uncore->pmic_bus_access_nb.notifier_call = i915_pmic_bus_access_notifier;
+	iosf_mbi_register_pmic_bus_access_notifier(&uncore->pmic_bus_access_nb);
+}
+
+int intel_uncore_init_mmio(struct intel_uncore *uncore)
+{
+	struct drm_i915_private *i915 = uncore->i915;
+	int ret;
+
+	ret = uncore_mmio_setup(uncore);
+	if (ret)
+		return ret;
+
+	i915_check_vgpu(i915);
+
+	if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
+		uncore->flags |= UNCORE_HAS_FORCEWAKE;
+
+	uncore->unclaimed_mmio_check = 1;
+
+	if (!intel_uncore_has_forcewake(uncore))
+		uncore_raw_init(uncore);
+	else
+		uncore_forcewake_init(uncore);
+
 	/* make sure fw funcs are set if and only if we have fw*/
 	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_get);
 	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_put);
@@ -1615,7 +1641,9 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 	if (IS_GEN_RANGE(i915, 6, 7))
 		uncore->flags |= UNCORE_HAS_FIFO;
 
-	iosf_mbi_register_pmic_bus_access_notifier(&uncore->pmic_bus_access_nb);
+	/* clear out unclaimed reg detection bit */
+	if (check_for_unclaimed_mmio(uncore))
+		DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n");
 
 	return 0;
 }
@@ -1628,41 +1656,44 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 void intel_uncore_prune_mmio_domains(struct intel_uncore *uncore)
 {
 	struct drm_i915_private *i915 = uncore->i915;
+	enum forcewake_domains fw_domains = uncore->fw_domains;
+	enum forcewake_domain_id domain_id;
+	int i;
 
-	if (INTEL_GEN(i915) >= 11) {
-		enum forcewake_domains fw_domains = uncore->fw_domains;
-		enum forcewake_domain_id domain_id;
-		int i;
+	if (!intel_uncore_has_forcewake(uncore) || INTEL_GEN(i915) < 11)
+		return;
 
-		for (i = 0; i < I915_MAX_VCS; i++) {
-			domain_id = FW_DOMAIN_ID_MEDIA_VDBOX0 + i;
+	for (i = 0; i < I915_MAX_VCS; i++) {
+		domain_id = FW_DOMAIN_ID_MEDIA_VDBOX0 + i;
 
-			if (HAS_ENGINE(i915, _VCS(i)))
-				continue;
+		if (HAS_ENGINE(i915, _VCS(i)))
+			continue;
 
-			if (fw_domains & BIT(domain_id))
-				fw_domain_fini(uncore, domain_id);
-		}
+		if (fw_domains & BIT(domain_id))
+			fw_domain_fini(uncore, domain_id);
+	}
 
-		for (i = 0; i < I915_MAX_VECS; i++) {
-			domain_id = FW_DOMAIN_ID_MEDIA_VEBOX0 + i;
+	for (i = 0; i < I915_MAX_VECS; i++) {
+		domain_id = FW_DOMAIN_ID_MEDIA_VEBOX0 + i;
 
-			if (HAS_ENGINE(i915, _VECS(i)))
-				continue;
+		if (HAS_ENGINE(i915, _VECS(i)))
+			continue;
 
-			if (fw_domains & BIT(domain_id))
-				fw_domain_fini(uncore, domain_id);
-		}
+		if (fw_domains & BIT(domain_id))
+			fw_domain_fini(uncore, domain_id);
 	}
 }
 
 void intel_uncore_fini_mmio(struct intel_uncore *uncore)
 {
-	iosf_mbi_punit_acquire();
-	iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
-		&uncore->pmic_bus_access_nb);
-	intel_uncore_forcewake_reset(uncore);
-	iosf_mbi_punit_release();
+	if (intel_uncore_has_forcewake(uncore)) {
+		iosf_mbi_punit_acquire();
+		iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
+			&uncore->pmic_bus_access_nb);
+		intel_uncore_forcewake_reset(uncore);
+		iosf_mbi_punit_release();
+	}
+
 	uncore_mmio_cleanup(uncore);
 }
 
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v2 4/6] drm/i915: skip forcewake actions on forcewake-less uncore

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-06-20 02:00:19)
> We always call some of the setup/cleanup functions for forcewake, even
> if the feature is not actually available. Skipping these operations if
> forcewake is not available saves us some operations on older gens and
> prepares us for having a forcewake-less display uncore.
> 
> v2: do not make suspend/resume functions forcewake-specific (Chris,
> Tvrtko), use GEM_BUG_ON in internal forcewake-only functions (Tvrtko)
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>

That looked ok to me, I don't have to relearn everything just yet :)

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v2 5/6] drm/i915: dynamically allocate forcewake domains

[Daniele Ceraolo Spurio]

We'd like to introduce a display uncore with no forcewake domains, so
let's avoid wasting memory and be ready to allocate only what we need.
Even without multiple uncore, we still don't need all the domains on all
gens.

v2: avoid hidden control flow, improve checks (Tvrtko), fix IVB special
case, add failure injection point

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 101 ++++++++++++++++++++--------
 drivers/gpu/drm/i915/intel_uncore.h |  13 ++--
 2 files changed, 77 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 00bf5e085a2c..2bd602a41bb7 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -344,7 +344,7 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
 {
 	struct intel_uncore_forcewake_domain *domain =
 	       container_of(timer, struct intel_uncore_forcewake_domain, timer);
-	struct intel_uncore *uncore = forcewake_domain_to_uncore(domain);
+	struct intel_uncore *uncore = domain->uncore;
 	unsigned long irqflags;
 
 	assert_rpm_device_not_suspended(uncore->rpm);
@@ -1293,23 +1293,27 @@ do { \
 	(uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \
 } while (0)
 
-static void fw_domain_init(struct intel_uncore *uncore,
-			   enum forcewake_domain_id domain_id,
-			   i915_reg_t reg_set,
-			   i915_reg_t reg_ack)
+static int __fw_domain_init(struct intel_uncore *uncore,
+			    enum forcewake_domain_id domain_id,
+			    i915_reg_t reg_set,
+			    i915_reg_t reg_ack)
 {
 	struct intel_uncore_forcewake_domain *d;
 
-	if (WARN_ON(domain_id >= FW_DOMAIN_ID_COUNT))
-		return;
+	GEM_BUG_ON(domain_id >= FW_DOMAIN_ID_COUNT);
+	GEM_BUG_ON(uncore->fw_domain[domain_id]);
 
-	d = &uncore->fw_domain[domain_id];
+	if (i915_inject_load_failure())
+		return -ENOMEM;
 
-	WARN_ON(d->wake_count);
+	d = kzalloc(sizeof(*d), GFP_KERNEL);
+	if (!d)
+		return -ENOMEM;
 
 	WARN_ON(!i915_mmio_reg_valid(reg_set));
 	WARN_ON(!i915_mmio_reg_valid(reg_ack));
 
+	d->uncore = uncore;
 	d->wake_count = 0;
 	d->reg_set = uncore->regs + i915_mmio_reg_offset(reg_set);
 	d->reg_ack = uncore->regs + i915_mmio_reg_offset(reg_ack);
@@ -1326,7 +1330,6 @@ static void fw_domain_init(struct intel_uncore *uncore,
 	BUILD_BUG_ON(FORCEWAKE_MEDIA_VEBOX0 != (1 << FW_DOMAIN_ID_MEDIA_VEBOX0));
 	BUILD_BUG_ON(FORCEWAKE_MEDIA_VEBOX1 != (1 << FW_DOMAIN_ID_MEDIA_VEBOX1));
 
-
 	d->mask = BIT(domain_id);
 
 	hrtimer_init(&d->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
@@ -1335,6 +1338,10 @@ static void fw_domain_init(struct intel_uncore *uncore,
 	uncore->fw_domains |= BIT(domain_id);
 
 	fw_domain_reset(d);
+
+	uncore->fw_domain[domain_id] = d;
+
+	return 0;
 }
 
 static void fw_domain_fini(struct intel_uncore *uncore,
@@ -1342,29 +1349,41 @@ static void fw_domain_fini(struct intel_uncore *uncore,
 {
 	struct intel_uncore_forcewake_domain *d;
 
-	if (WARN_ON(domain_id >= FW_DOMAIN_ID_COUNT))
-		return;
+	GEM_BUG_ON(domain_id >= FW_DOMAIN_ID_COUNT);
 
-	d = &uncore->fw_domain[domain_id];
+	d = fetch_and_zero(&uncore->fw_domain[domain_id]);
+	if (!d)
+		return;
 
+	uncore->fw_domains &= ~BIT(domain_id);
 	WARN_ON(d->wake_count);
 	WARN_ON(hrtimer_cancel(&d->timer));
-	memset(d, 0, sizeof(*d));
+	kfree(d);
+}
 
-	uncore->fw_domains &= ~BIT(domain_id);
+static void intel_uncore_fw_domains_fini(struct intel_uncore *uncore)
+{
+	struct intel_uncore_forcewake_domain *d;
+	int tmp;
+
+	for_each_fw_domain(d, uncore, tmp)
+		fw_domain_fini(uncore, d->id);
 }
 
-static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
+static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 {
 	struct drm_i915_private *i915 = uncore->i915;
+	int ret = 0;
 
 	GEM_BUG_ON(!intel_uncore_has_forcewake(uncore));
 
+#define fw_domain_init(uncore__, id__, set__, ack__) \
+	(ret ?: (ret = __fw_domain_init((uncore__), (id__), (set__), (ack__))))
+
 	if (INTEL_GEN(i915) >= 11) {
 		int i;
 
-		uncore->funcs.force_wake_get =
-			fw_domains_get_with_fallback;
+		uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
 		uncore->funcs.force_wake_put = fw_domains_put;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_RENDER_GEN9,
@@ -1372,6 +1391,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 		fw_domain_init(uncore, FW_DOMAIN_ID_BLITTER,
 			       FORCEWAKE_BLITTER_GEN9,
 			       FORCEWAKE_ACK_BLITTER_GEN9);
+
 		for (i = 0; i < I915_MAX_VCS; i++) {
 			if (!HAS_ENGINE(i915, _VCS(i)))
 				continue;
@@ -1389,8 +1409,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 				       FORCEWAKE_ACK_MEDIA_VEBOX_GEN11(i));
 		}
 	} else if (IS_GEN_RANGE(i915, 9, 10)) {
-		uncore->funcs.force_wake_get =
-			fw_domains_get_with_fallback;
+		uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
 		uncore->funcs.force_wake_put = fw_domains_put;
 		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_RENDER_GEN9,
@@ -1439,8 +1458,10 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 		__raw_uncore_write32(uncore, FORCEWAKE, 0);
 		__raw_posting_read(uncore, ECOBUS);
 
-		fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
-			       FORCEWAKE_MT, FORCEWAKE_MT_ACK);
+		ret = __fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
+				       FORCEWAKE_MT, FORCEWAKE_MT_ACK);
+		if (ret)
+			goto out;
 
 		spin_lock_irq(&uncore->lock);
 		fw_domains_get_with_thread_status(uncore, FORCEWAKE_RENDER);
@@ -1451,6 +1472,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 		if (!(ecobus & FORCEWAKE_MT_ENABLE)) {
 			DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n");
 			DRM_INFO("when using vblank-synced partial screen updates.\n");
+			fw_domain_fini(uncore, FW_DOMAIN_ID_RENDER);
 			fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
 				       FORCEWAKE, FORCEWAKE_ACK);
 		}
@@ -1462,8 +1484,16 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
 			       FORCEWAKE, FORCEWAKE_ACK);
 	}
 
+#undef fw_domain_init
+
 	/* All future platforms are expected to require complex power gating */
-	WARN_ON(uncore->fw_domains == 0);
+	WARN_ON(!ret && uncore->fw_domains == 0);
+
+out:
+	if (ret)
+		intel_uncore_fw_domains_fini(uncore);
+
+	return ret;
 }
 
 #define ASSIGN_FW_DOMAINS_TABLE(uncore, d) \
@@ -1564,13 +1594,17 @@ static void uncore_raw_init(struct intel_uncore *uncore)
 	}
 }
 
-static void uncore_forcewake_init(struct intel_uncore *uncore)
+static int uncore_forcewake_init(struct intel_uncore *uncore)
 {
 	struct drm_i915_private *i915 = uncore->i915;
+	int ret;
 
 	GEM_BUG_ON(!intel_uncore_has_forcewake(uncore));
 
-	intel_uncore_fw_domains_init(uncore);
+	ret = intel_uncore_fw_domains_init(uncore);
+	if (ret)
+		return ret;
+
 	forcewake_early_sanitize(uncore, 0);
 
 	if (IS_GEN_RANGE(i915, 6, 7)) {
@@ -1603,6 +1637,8 @@ static void uncore_forcewake_init(struct intel_uncore *uncore)
 
 	uncore->pmic_bus_access_nb.notifier_call = i915_pmic_bus_access_notifier;
 	iosf_mbi_register_pmic_bus_access_notifier(&uncore->pmic_bus_access_nb);
+
+	return 0;
 }
 
 int intel_uncore_init_mmio(struct intel_uncore *uncore)
@@ -1621,10 +1657,13 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 
 	uncore->unclaimed_mmio_check = 1;
 
-	if (!intel_uncore_has_forcewake(uncore))
+	if (!intel_uncore_has_forcewake(uncore)) {
 		uncore_raw_init(uncore);
-	else
-		uncore_forcewake_init(uncore);
+	} else {
+		ret = uncore_forcewake_init(uncore);
+		if (ret)
+			goto out_mmio_cleanup;
+	}
 
 	/* make sure fw funcs are set if and only if we have fw*/
 	GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_get);
@@ -1646,6 +1685,11 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 		DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n");
 
 	return 0;
+
+out_mmio_cleanup:
+	uncore_mmio_cleanup(uncore);
+
+	return ret;
 }
 
 /*
@@ -1691,6 +1735,7 @@ void intel_uncore_fini_mmio(struct intel_uncore *uncore)
 		iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
 			&uncore->pmic_bus_access_nb);
 		intel_uncore_forcewake_reset(uncore);
+		intel_uncore_fw_domains_fini(uncore);
 		iosf_mbi_punit_release();
 	}
 
diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
index 59505a2f9097..7108475d9b24 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -126,6 +126,7 @@ struct intel_uncore {
 	enum forcewake_domains fw_domains_saved; /* user domains saved for S3 */
 
 	struct intel_uncore_forcewake_domain {
+		struct intel_uncore *uncore;
 		enum forcewake_domain_id id;
 		enum forcewake_domains mask;
 		unsigned int wake_count;
@@ -133,7 +134,7 @@ struct intel_uncore {
 		struct hrtimer timer;
 		u32 __iomem *reg_set;
 		u32 __iomem *reg_ack;
-	} fw_domain[FW_DOMAIN_ID_COUNT];
+	} *fw_domain[FW_DOMAIN_ID_COUNT];
 
 	struct {
 		unsigned int count;
@@ -147,18 +148,12 @@ struct intel_uncore {
 
 /* Iterate over initialised fw domains */
 #define for_each_fw_domain_masked(domain__, mask__, uncore__, tmp__) \
-	for (tmp__ = (mask__); \
-	     tmp__ ? (domain__ = &(uncore__)->fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
+	for (tmp__ = (mask__); tmp__ ;) \
+		for_each_if(domain__ = (uncore__)->fw_domain[__mask_next_bit(tmp__)])
 
 #define for_each_fw_domain(domain__, uncore__, tmp__) \
 	for_each_fw_domain_masked(domain__, (uncore__)->fw_domains, uncore__, tmp__)
 
-static inline struct intel_uncore *
-forcewake_domain_to_uncore(const struct intel_uncore_forcewake_domain *d)
-{
-	return container_of(d, struct intel_uncore, fw_domain[d->id]);
-}
-
 static inline bool
 intel_uncore_has_forcewake(const struct intel_uncore *uncore)
 {
-- 
2.20.1

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Re: [PATCH v2 5/6] drm/i915: dynamically allocate forcewake domains

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2019-06-20 02:00:20)
> We'd like to introduce a display uncore with no forcewake domains, so
> let's avoid wasting memory and be ready to allocate only what we need.
> Even without multiple uncore, we still don't need all the domains on all
> gens.
> 
> v2: avoid hidden control flow, improve checks (Tvrtko), fix IVB special
> case, add failure injection point
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 101 ++++++++++++++++++++--------
>  drivers/gpu/drm/i915/intel_uncore.h |  13 ++--
>  2 files changed, 77 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 00bf5e085a2c..2bd602a41bb7 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -344,7 +344,7 @@ intel_uncore_fw_release_timer(struct hrtimer *timer)
>  {
>         struct intel_uncore_forcewake_domain *domain =
>                container_of(timer, struct intel_uncore_forcewake_domain, timer);
> -       struct intel_uncore *uncore = forcewake_domain_to_uncore(domain);
> +       struct intel_uncore *uncore = domain->uncore;
>         unsigned long irqflags;
>  
>         assert_rpm_device_not_suspended(uncore->rpm);
> @@ -1293,23 +1293,27 @@ do { \
>         (uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \
>  } while (0)
>  
> -static void fw_domain_init(struct intel_uncore *uncore,
> -                          enum forcewake_domain_id domain_id,
> -                          i915_reg_t reg_set,
> -                          i915_reg_t reg_ack)
> +static int __fw_domain_init(struct intel_uncore *uncore,
> +                           enum forcewake_domain_id domain_id,
> +                           i915_reg_t reg_set,
> +                           i915_reg_t reg_ack)
>  {
>         struct intel_uncore_forcewake_domain *d;
>  
> -       if (WARN_ON(domain_id >= FW_DOMAIN_ID_COUNT))
> -               return;
> +       GEM_BUG_ON(domain_id >= FW_DOMAIN_ID_COUNT);
> +       GEM_BUG_ON(uncore->fw_domain[domain_id]);
>  
> -       d = &uncore->fw_domain[domain_id];
> +       if (i915_inject_load_failure())
> +               return -ENOMEM;

Will be an interesting test for the test (well dmesg parser to see if it
is still getting upset over nothing).

> -       WARN_ON(d->wake_count);
> +       d = kzalloc(sizeof(*d), GFP_KERNEL);
> +       if (!d)
> +               return -ENOMEM;
>  
>         WARN_ON(!i915_mmio_reg_valid(reg_set));
>         WARN_ON(!i915_mmio_reg_valid(reg_ack));
>  
> +       d->uncore = uncore;
>         d->wake_count = 0;
>         d->reg_set = uncore->regs + i915_mmio_reg_offset(reg_set);
>         d->reg_ack = uncore->regs + i915_mmio_reg_offset(reg_ack);
> @@ -1326,7 +1330,6 @@ static void fw_domain_init(struct intel_uncore *uncore,
>         BUILD_BUG_ON(FORCEWAKE_MEDIA_VEBOX0 != (1 << FW_DOMAIN_ID_MEDIA_VEBOX0));
>         BUILD_BUG_ON(FORCEWAKE_MEDIA_VEBOX1 != (1 << FW_DOMAIN_ID_MEDIA_VEBOX1));
>  
> -
>         d->mask = BIT(domain_id);
>  
>         hrtimer_init(&d->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
> @@ -1335,6 +1338,10 @@ static void fw_domain_init(struct intel_uncore *uncore,
>         uncore->fw_domains |= BIT(domain_id);
>  
>         fw_domain_reset(d);
> +
> +       uncore->fw_domain[domain_id] = d;

Fwiw, I would pair this with setting the mask in uncore->fw_domains.

> +
> +       return 0;
>  }
>  
>  static void fw_domain_fini(struct intel_uncore *uncore,
> @@ -1342,29 +1349,41 @@ static void fw_domain_fini(struct intel_uncore *uncore,
>  {
>         struct intel_uncore_forcewake_domain *d;
>  
> -       if (WARN_ON(domain_id >= FW_DOMAIN_ID_COUNT))
> -               return;
> +       GEM_BUG_ON(domain_id >= FW_DOMAIN_ID_COUNT);
>  
> -       d = &uncore->fw_domain[domain_id];
> +       d = fetch_and_zero(&uncore->fw_domain[domain_id]);
> +       if (!d)
> +               return;
>  
> +       uncore->fw_domains &= ~BIT(domain_id);
>         WARN_ON(d->wake_count);
>         WARN_ON(hrtimer_cancel(&d->timer));
> -       memset(d, 0, sizeof(*d));
> +       kfree(d);
> +}
>  
> -       uncore->fw_domains &= ~BIT(domain_id);
> +static void intel_uncore_fw_domains_fini(struct intel_uncore *uncore)
> +{
> +       struct intel_uncore_forcewake_domain *d;
> +       int tmp;
> +
> +       for_each_fw_domain(d, uncore, tmp)
> +               fw_domain_fini(uncore, d->id);
>  }
>  
> -static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
> +static int intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>  {
>         struct drm_i915_private *i915 = uncore->i915;
> +       int ret = 0;
>  
>         GEM_BUG_ON(!intel_uncore_has_forcewake(uncore));
>  
> +#define fw_domain_init(uncore__, id__, set__, ack__) \
> +       (ret ?: (ret = __fw_domain_init((uncore__), (id__), (set__), (ack__))))

Seems a reasonable compromise, that I'm sure we'll live to regret. :)

>         if (INTEL_GEN(i915) >= 11) {
>                 int i;
>  
> -               uncore->funcs.force_wake_get =
> -                       fw_domains_get_with_fallback;
> +               uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
>                 uncore->funcs.force_wake_put = fw_domains_put;
>                 fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>                                FORCEWAKE_RENDER_GEN9,
> @@ -1372,6 +1391,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>                 fw_domain_init(uncore, FW_DOMAIN_ID_BLITTER,
>                                FORCEWAKE_BLITTER_GEN9,
>                                FORCEWAKE_ACK_BLITTER_GEN9);
> +
>                 for (i = 0; i < I915_MAX_VCS; i++) {
>                         if (!HAS_ENGINE(i915, _VCS(i)))
>                                 continue;
> @@ -1389,8 +1409,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>                                        FORCEWAKE_ACK_MEDIA_VEBOX_GEN11(i));
>                 }
>         } else if (IS_GEN_RANGE(i915, 9, 10)) {
> -               uncore->funcs.force_wake_get =
> -                       fw_domains_get_with_fallback;
> +               uncore->funcs.force_wake_get = fw_domains_get_with_fallback;
>                 uncore->funcs.force_wake_put = fw_domains_put;
>                 fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>                                FORCEWAKE_RENDER_GEN9,
> @@ -1439,8 +1458,10 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>                 __raw_uncore_write32(uncore, FORCEWAKE, 0);
>                 __raw_posting_read(uncore, ECOBUS);
>  
> -               fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
> -                              FORCEWAKE_MT, FORCEWAKE_MT_ACK);
> +               ret = __fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
> +                                      FORCEWAKE_MT, FORCEWAKE_MT_ACK);
> +               if (ret)
> +                       goto out;
>  
>                 spin_lock_irq(&uncore->lock);
>                 fw_domains_get_with_thread_status(uncore, FORCEWAKE_RENDER);
> @@ -1451,6 +1472,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>                 if (!(ecobus & FORCEWAKE_MT_ENABLE)) {
>                         DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n");
>                         DRM_INFO("when using vblank-synced partial screen updates.\n");
> +                       fw_domain_fini(uncore, FW_DOMAIN_ID_RENDER);
>                         fw_domain_init(uncore, FW_DOMAIN_ID_RENDER,
>                                        FORCEWAKE, FORCEWAKE_ACK);
>                 }
> @@ -1462,8 +1484,16 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
>                                FORCEWAKE, FORCEWAKE_ACK);
>         }
>  
> +#undef fw_domain_init
> +
>         /* All future platforms are expected to require complex power gating */
> -       WARN_ON(uncore->fw_domains == 0);
> +       WARN_ON(!ret && uncore->fw_domains == 0);
> +
> +out:
> +       if (ret)
> +               intel_uncore_fw_domains_fini(uncore);
> +
> +       return ret;
>  }
>  
>  #define ASSIGN_FW_DOMAINS_TABLE(uncore, d) \
> @@ -1564,13 +1594,17 @@ static void uncore_raw_init(struct intel_uncore *uncore)
>         }
>  }
>  
> -static void uncore_forcewake_init(struct intel_uncore *uncore)
> +static int uncore_forcewake_init(struct intel_uncore *uncore)
>  {
>         struct drm_i915_private *i915 = uncore->i915;
> +       int ret;
>  
>         GEM_BUG_ON(!intel_uncore_has_forcewake(uncore));
>  
> -       intel_uncore_fw_domains_init(uncore);
> +       ret = intel_uncore_fw_domains_init(uncore);
> +       if (ret)
> +               return ret;
> +
>         forcewake_early_sanitize(uncore, 0);
>  
>         if (IS_GEN_RANGE(i915, 6, 7)) {
> @@ -1603,6 +1637,8 @@ static void uncore_forcewake_init(struct intel_uncore *uncore)
>  
>         uncore->pmic_bus_access_nb.notifier_call = i915_pmic_bus_access_notifier;
>         iosf_mbi_register_pmic_bus_access_notifier(&uncore->pmic_bus_access_nb);
> +
> +       return 0;
>  }
>  
>  int intel_uncore_init_mmio(struct intel_uncore *uncore)
> @@ -1621,10 +1657,13 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
>  
>         uncore->unclaimed_mmio_check = 1;
>  
> -       if (!intel_uncore_has_forcewake(uncore))
> +       if (!intel_uncore_has_forcewake(uncore)) {
>                 uncore_raw_init(uncore);
> -       else
> -               uncore_forcewake_init(uncore);
> +       } else {
> +               ret = uncore_forcewake_init(uncore);
> +               if (ret)
> +                       goto out_mmio_cleanup;
> +       }
>  
>         /* make sure fw funcs are set if and only if we have fw*/
>         GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_get);
> @@ -1646,6 +1685,11 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
>                 DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n");
>  
>         return 0;
> +
> +out_mmio_cleanup:
> +       uncore_mmio_cleanup(uncore);
> +
> +       return ret;
>  }
>  
>  /*
> @@ -1691,6 +1735,7 @@ void intel_uncore_fini_mmio(struct intel_uncore *uncore)
>                 iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(
>                         &uncore->pmic_bus_access_nb);
>                 intel_uncore_forcewake_reset(uncore);
> +               intel_uncore_fw_domains_fini(uncore);

Ok, looks like this is paired correctly. I suppose we can't do the
allocations any earlier, and it does make sense that we can't detect the
domains until we can probe the HW so mmio.

>                 iosf_mbi_punit_release();
>         }
>  
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h
> index 59505a2f9097..7108475d9b24 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.h
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -126,6 +126,7 @@ struct intel_uncore {
>         enum forcewake_domains fw_domains_saved; /* user domains saved for S3 */
>  
>         struct intel_uncore_forcewake_domain {
> +               struct intel_uncore *uncore;
>                 enum forcewake_domain_id id;
>                 enum forcewake_domains mask;
>                 unsigned int wake_count;
> @@ -133,7 +134,7 @@ struct intel_uncore {
>                 struct hrtimer timer;
>                 u32 __iomem *reg_set;
>                 u32 __iomem *reg_ack;
> -       } fw_domain[FW_DOMAIN_ID_COUNT];
> +       } *fw_domain[FW_DOMAIN_ID_COUNT];

How long before we start using a tree for the countless domains :)

>  
>         struct {
>                 unsigned int count;
> @@ -147,18 +148,12 @@ struct intel_uncore {
>  
>  /* Iterate over initialised fw domains */
>  #define for_each_fw_domain_masked(domain__, mask__, uncore__, tmp__) \
> -       for (tmp__ = (mask__); \
> -            tmp__ ? (domain__ = &(uncore__)->fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
> +       for (tmp__ = (mask__); tmp__ ;) \
> +               for_each_if(domain__ = (uncore__)->fw_domain[__mask_next_bit(tmp__)])
>  
>  #define for_each_fw_domain(domain__, uncore__, tmp__) \
>         for_each_fw_domain_masked(domain__, (uncore__)->fw_domains, uncore__, tmp__)
>  
> -static inline struct intel_uncore *
> -forcewake_domain_to_uncore(const struct intel_uncore_forcewake_domain *d)
> -{
> -       return container_of(d, struct intel_uncore, fw_domain[d->id]);
> -}
> -
>  static inline bool
>  intel_uncore_has_forcewake(const struct intel_uncore *uncore)
>  {

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[PATCH v2 6/6] drm/i915/gvt: decouple check_vgpu() from uncore_init()

[Daniele Ceraolo Spurio]

With multiple uncore to initialize (GT vs Display), it makes little
sense to have the vgpu_check inside uncore_init(). We also have
a catch-22 scenario where the uncore is required to read the vgpu
capabilities while the vgpu capabilities are required to decide if
we need to initialize forcewake support. To remove this circular
dependency, we can perform the required MMIO access by mmapping just
the vgtif shared page in mmio space and use raw accessors.

v2: rename check_vgpu to detect_vgpu (Chris)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.c     |  2 ++
 drivers/gpu/drm/i915/i915_pvinfo.h  |  5 +++--
 drivers/gpu/drm/i915/i915_vgpu.c    | 35 ++++++++++++++++++++++-------
 drivers/gpu/drm/i915/i915_vgpu.h    |  2 +-
 drivers/gpu/drm/i915/intel_uncore.c |  2 --
 5 files changed, 33 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 00b6512cdee6..8f84ed26e972 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1899,6 +1899,8 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 
 	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
+	i915_detect_vgpu(dev_priv);
+
 	ret = i915_driver_init_mmio(dev_priv);
 	if (ret < 0)
 		goto out_runtime_pm_put;
diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
index 969e514916ab..ca4661e98f79 100644
--- a/drivers/gpu/drm/i915/i915_pvinfo.h
+++ b/drivers/gpu/drm/i915/i915_pvinfo.h
@@ -110,8 +110,9 @@ struct vgt_if {
 	u32  rsv7[0x200 - 24];    /* pad to one page */
 } __packed;
 
-#define vgtif_reg(x) \
-	_MMIO((VGT_PVINFO_PAGE + offsetof(struct vgt_if, x)))
+#define vgtif_offset(x) (offsetof(struct vgt_if, x))
+
+#define vgtif_reg(x) _MMIO(VGT_PVINFO_PAGE + vgtif_offset(x))
 
 /* vGPU display status to be used by the host side */
 #define VGT_DRV_DISPLAY_NOT_READY 0
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 94d3992b599d..1a8f7c731126 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -52,34 +52,53 @@
  */
 
 /**
- * i915_check_vgpu - detect virtual GPU
+ * i915_detect_vgpu - detect virtual GPU
  * @dev_priv: i915 device private
  *
  * This function is called at the initialization stage, to detect whether
  * running on a vGPU.
  */
-void i915_check_vgpu(struct drm_i915_private *dev_priv)
+void i915_detect_vgpu(struct drm_i915_private *dev_priv)
 {
-	struct intel_uncore *uncore = &dev_priv->uncore;
+	struct pci_dev *pdev = dev_priv->drm.pdev;
 	u64 magic;
 	u16 version_major;
+	void __iomem *shared_area;
 
 	BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
 
-	magic = __raw_uncore_read64(uncore, vgtif_reg(magic));
-	if (magic != VGT_MAGIC)
+	/*
+	 * This is called before we setup the main MMIO BAR mappings used via
+	 * the uncore structure, so we need to access the BAR directly. Since
+	 * we do not support VGT on older gens, return early so we don't have
+	 * to consider differently numbered or sized MMIO bars
+	 */
+	if (INTEL_GEN(dev_priv) < 6)
+		return;
+
+	shared_area = pci_iomap_range(pdev, 0, VGT_PVINFO_PAGE, VGT_PVINFO_SIZE);
+	if (!shared_area) {
+		DRM_ERROR("failed to map MMIO bar to check for VGT\n");
 		return;
+	}
+
+	magic = readq(shared_area + vgtif_offset(magic));
+	if (magic != VGT_MAGIC)
+		goto out;
 
-	version_major = __raw_uncore_read16(uncore, vgtif_reg(version_major));
+	version_major = readw(shared_area + vgtif_offset(version_major));
 	if (version_major < VGT_VERSION_MAJOR) {
 		DRM_INFO("VGT interface version mismatch!\n");
-		return;
+		goto out;
 	}
 
-	dev_priv->vgpu.caps = __raw_uncore_read32(uncore, vgtif_reg(vgt_caps));
+	dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps));
 
 	dev_priv->vgpu.active = true;
 	DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
+
+out:
+	pci_iounmap(pdev, shared_area);
 }
 
 bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index ebe1b7bced98..a919735fb6ce 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -26,7 +26,7 @@
 
 #include "i915_pvinfo.h"
 
-void i915_check_vgpu(struct drm_i915_private *dev_priv);
+void i915_detect_vgpu(struct drm_i915_private *dev_priv);
 
 bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv);
 
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2bd602a41bb7..68d54e126d79 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1650,8 +1650,6 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
 	if (ret)
 		return ret;
 
-	i915_check_vgpu(i915);
-
 	if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
 		uncore->flags |= UNCORE_HAS_FORCEWAKE;
 
-- 
2.20.1

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Re: [PATCH v2 6/6] drm/i915/gvt: decouple check_vgpu() from uncore_init()

[Zhenyu Wang]

[-- Attachment #1.1: Type: text/plain, Size: 5694 bytes --]

On 2019.06.19 18:00:21 -0700, Daniele Ceraolo Spurio wrote:
> With multiple uncore to initialize (GT vs Display), it makes little
> sense to have the vgpu_check inside uncore_init(). We also have
> a catch-22 scenario where the uncore is required to read the vgpu
> capabilities while the vgpu capabilities are required to decide if
> we need to initialize forcewake support. To remove this circular
> dependency, we can perform the required MMIO access by mmapping just
> the vgtif shared page in mmio space and use raw accessors.
> 
> v2: rename check_vgpu to detect_vgpu (Chris)
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>

Looks good to me.

Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.c     |  2 ++
>  drivers/gpu/drm/i915/i915_pvinfo.h  |  5 +++--
>  drivers/gpu/drm/i915/i915_vgpu.c    | 35 ++++++++++++++++++++++-------
>  drivers/gpu/drm/i915/i915_vgpu.h    |  2 +-
>  drivers/gpu/drm/i915/intel_uncore.c |  2 --
>  5 files changed, 33 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 00b6512cdee6..8f84ed26e972 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1899,6 +1899,8 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
>  
>  	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
>  
> +	i915_detect_vgpu(dev_priv);
> +
>  	ret = i915_driver_init_mmio(dev_priv);
>  	if (ret < 0)
>  		goto out_runtime_pm_put;
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
> index 969e514916ab..ca4661e98f79 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -110,8 +110,9 @@ struct vgt_if {
>  	u32  rsv7[0x200 - 24];    /* pad to one page */
>  } __packed;
>  
> -#define vgtif_reg(x) \
> -	_MMIO((VGT_PVINFO_PAGE + offsetof(struct vgt_if, x)))
> +#define vgtif_offset(x) (offsetof(struct vgt_if, x))
> +
> +#define vgtif_reg(x) _MMIO(VGT_PVINFO_PAGE + vgtif_offset(x))
>  
>  /* vGPU display status to be used by the host side */
>  #define VGT_DRV_DISPLAY_NOT_READY 0
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
> index 94d3992b599d..1a8f7c731126 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -52,34 +52,53 @@
>   */
>  
>  /**
> - * i915_check_vgpu - detect virtual GPU
> + * i915_detect_vgpu - detect virtual GPU
>   * @dev_priv: i915 device private
>   *
>   * This function is called at the initialization stage, to detect whether
>   * running on a vGPU.
>   */
> -void i915_check_vgpu(struct drm_i915_private *dev_priv)
> +void i915_detect_vgpu(struct drm_i915_private *dev_priv)
>  {
> -	struct intel_uncore *uncore = &dev_priv->uncore;
> +	struct pci_dev *pdev = dev_priv->drm.pdev;
>  	u64 magic;
>  	u16 version_major;
> +	void __iomem *shared_area;
>  
>  	BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
>  
> -	magic = __raw_uncore_read64(uncore, vgtif_reg(magic));
> -	if (magic != VGT_MAGIC)
> +	/*
> +	 * This is called before we setup the main MMIO BAR mappings used via
> +	 * the uncore structure, so we need to access the BAR directly. Since
> +	 * we do not support VGT on older gens, return early so we don't have
> +	 * to consider differently numbered or sized MMIO bars
> +	 */
> +	if (INTEL_GEN(dev_priv) < 6)
> +		return;
> +
> +	shared_area = pci_iomap_range(pdev, 0, VGT_PVINFO_PAGE, VGT_PVINFO_SIZE);
> +	if (!shared_area) {
> +		DRM_ERROR("failed to map MMIO bar to check for VGT\n");
>  		return;
> +	}
> +
> +	magic = readq(shared_area + vgtif_offset(magic));
> +	if (magic != VGT_MAGIC)
> +		goto out;
>  
> -	version_major = __raw_uncore_read16(uncore, vgtif_reg(version_major));
> +	version_major = readw(shared_area + vgtif_offset(version_major));
>  	if (version_major < VGT_VERSION_MAJOR) {
>  		DRM_INFO("VGT interface version mismatch!\n");
> -		return;
> +		goto out;
>  	}
>  
> -	dev_priv->vgpu.caps = __raw_uncore_read32(uncore, vgtif_reg(vgt_caps));
> +	dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps));
>  
>  	dev_priv->vgpu.active = true;
>  	DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
> +
> +out:
> +	pci_iounmap(pdev, shared_area);
>  }
>  
>  bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
> index ebe1b7bced98..a919735fb6ce 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.h
> +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> @@ -26,7 +26,7 @@
>  
>  #include "i915_pvinfo.h"
>  
> -void i915_check_vgpu(struct drm_i915_private *dev_priv);
> +void i915_detect_vgpu(struct drm_i915_private *dev_priv);
>  
>  bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv);
>  
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2bd602a41bb7..68d54e126d79 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1650,8 +1650,6 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
>  	if (ret)
>  		return ret;
>  
> -	i915_check_vgpu(i915);
> -
>  	if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
>  		uncore->flags |= UNCORE_HAS_FORCEWAKE;
>  
> -- 
> 2.20.1
> 

-- 
Open Source Technology Center, Intel ltd.

$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827

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[-- Type: application/pgp-signature, Size: 195 bytes --]

[-- Attachment #2: Type: text/plain, Size: 159 bytes --]

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Re: [PATCH v2 6/6] drm/i915/gvt: decouple check_vgpu() from uncore_init()

[Chris Wilson]

Quoting Zhenyu Wang (2019-06-20 03:15:35)
> On 2019.06.19 18:00:21 -0700, Daniele Ceraolo Spurio wrote:
> > With multiple uncore to initialize (GT vs Display), it makes little
> > sense to have the vgpu_check inside uncore_init(). We also have
> > a catch-22 scenario where the uncore is required to read the vgpu
> > capabilities while the vgpu capabilities are required to decide if
> > we need to initialize forcewake support. To remove this circular
> > dependency, we can perform the required MMIO access by mmapping just
> > the vgtif shared page in mmio space and use raw accessors.
> > 
> > v2: rename check_vgpu to detect_vgpu (Chris)
> > 
> > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> 
> Looks good to me.
> 
> Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/i915_drv.c     |  2 ++
> >  drivers/gpu/drm/i915/i915_pvinfo.h  |  5 +++--
> >  drivers/gpu/drm/i915/i915_vgpu.c    | 35 ++++++++++++++++++++++-------
> >  drivers/gpu/drm/i915/i915_vgpu.h    |  2 +-
> >  drivers/gpu/drm/i915/intel_uncore.c |  2 --
> >  5 files changed, 33 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index 00b6512cdee6..8f84ed26e972 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -1899,6 +1899,8 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
> >  
> >       disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
> >  
> > +     i915_detect_vgpu(dev_priv);
> > +
> >       ret = i915_driver_init_mmio(dev_priv);
> >       if (ret < 0)
> >               goto out_runtime_pm_put;
> > diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
> > index 969e514916ab..ca4661e98f79 100644
> > --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> > +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> > @@ -110,8 +110,9 @@ struct vgt_if {
> >       u32  rsv7[0x200 - 24];    /* pad to one page */
> >  } __packed;
> >  
> > -#define vgtif_reg(x) \
> > -     _MMIO((VGT_PVINFO_PAGE + offsetof(struct vgt_if, x)))
> > +#define vgtif_offset(x) (offsetof(struct vgt_if, x))
> > +
> > +#define vgtif_reg(x) _MMIO(VGT_PVINFO_PAGE + vgtif_offset(x))
> >  
> >  /* vGPU display status to be used by the host side */
> >  #define VGT_DRV_DISPLAY_NOT_READY 0
> > diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
> > index 94d3992b599d..1a8f7c731126 100644
> > --- a/drivers/gpu/drm/i915/i915_vgpu.c
> > +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> > @@ -52,34 +52,53 @@
> >   */
> >  
> >  /**
> > - * i915_check_vgpu - detect virtual GPU
> > + * i915_detect_vgpu - detect virtual GPU
> >   * @dev_priv: i915 device private
> >   *
> >   * This function is called at the initialization stage, to detect whether
> >   * running on a vGPU.
> >   */
> > -void i915_check_vgpu(struct drm_i915_private *dev_priv)
> > +void i915_detect_vgpu(struct drm_i915_private *dev_priv)
> >  {
> > -     struct intel_uncore *uncore = &dev_priv->uncore;
> > +     struct pci_dev *pdev = dev_priv->drm.pdev;
> >       u64 magic;
> >       u16 version_major;
> > +     void __iomem *shared_area;
> >  
> >       BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
> >  
> > -     magic = __raw_uncore_read64(uncore, vgtif_reg(magic));
> > -     if (magic != VGT_MAGIC)
> > +     /*
> > +      * This is called before we setup the main MMIO BAR mappings used via
> > +      * the uncore structure, so we need to access the BAR directly. Since
> > +      * we do not support VGT on older gens, return early so we don't have
> > +      * to consider differently numbered or sized MMIO bars
> > +      */
> > +     if (INTEL_GEN(dev_priv) < 6)
> > +             return;
> > +
> > +     shared_area = pci_iomap_range(pdev, 0, VGT_PVINFO_PAGE, VGT_PVINFO_SIZE);
> > +     if (!shared_area) {
> > +             DRM_ERROR("failed to map MMIO bar to check for VGT\n");
> >               return;
> > +     }
> > +
> > +     magic = readq(shared_area + vgtif_offset(magic));
> > +     if (magic != VGT_MAGIC)
> > +             goto out;
> >  
> > -     version_major = __raw_uncore_read16(uncore, vgtif_reg(version_major));
> > +     version_major = readw(shared_area + vgtif_offset(version_major));
> >       if (version_major < VGT_VERSION_MAJOR) {
> >               DRM_INFO("VGT interface version mismatch!\n");
> > -             return;
> > +             goto out;
> >       }
> >  
> > -     dev_priv->vgpu.caps = __raw_uncore_read32(uncore, vgtif_reg(vgt_caps));
> > +     dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps));
> >  
> >       dev_priv->vgpu.active = true;
> >       DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
> > +
> > +out:
> > +     pci_iounmap(pdev, shared_area);
> >  }
> >  
> >  bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
> > diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
> > index ebe1b7bced98..a919735fb6ce 100644
> > --- a/drivers/gpu/drm/i915/i915_vgpu.h
> > +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> > @@ -26,7 +26,7 @@
> >  
> >  #include "i915_pvinfo.h"
> >  
> > -void i915_check_vgpu(struct drm_i915_private *dev_priv);
> > +void i915_detect_vgpu(struct drm_i915_private *dev_priv);
> >  
> >  bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv);
> >  
> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > index 2bd602a41bb7..68d54e126d79 100644
> > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > @@ -1650,8 +1650,6 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
> >       if (ret)
> >               return ret;
> >  
> > -     i915_check_vgpu(i915);
> > -
> >       if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
> >               uncore->flags |= UNCORE_HAS_FORCEWAKE;

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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✗ Fi.CI.CHECKPATCH: warning for Display uncore prep patches (rev2)

[Patchwork]

== Series Details ==

Series: Display uncore prep patches (rev2)
URL   : https://patchwork.freedesktop.org/series/62232/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d925fdfca22c drm/i915: use vfuncs for reg_read/write_fw_domains
-:62: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'func' - possible side-effects?
#62: FILE: drivers/gpu/drm/i915/intel_uncore.c:1155:
+#define __gen_reg_read_funcs(func) \
+static enum forcewake_domains \
+func##_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
+	return __##func##_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
+} \
+\
+__gen_read(func, 8) \
+__gen_read(func, 16) \
+__gen_read(func, 32) \
+__gen_read(func, 64)

-:85: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#85: FILE: drivers/gpu/drm/i915/intel_uncore.c:1231:
 }
+__gen6_write(8)

-:116: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'func' - possible side-effects?
#116: FILE: drivers/gpu/drm/i915/intel_uncore.c:1247:
+#define __gen_reg_write_funcs(func) \
+static enum forcewake_domains \
+func##_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
+	return __##func##_reg_write_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
+} \
+\
+__gen_write(func, 8) \
+__gen_write(func, 16) \
+__gen_write(func, 32)

-:135: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'uncore' - possible side-effects?
#135: FILE: drivers/gpu/drm/i915/intel_uncore.c:1265:
+#define ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, x) \
 do { \
 	(uncore)->funcs.mmio_writeb = x##_write8; \
 	(uncore)->funcs.mmio_writew = x##_write16; \
 	(uncore)->funcs.mmio_writel = x##_write32; \
 } while (0)

-:143: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'uncore' - possible side-effects?
#143: FILE: drivers/gpu/drm/i915/intel_uncore.c:1272:
+#define ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x) \
 do { \
 	(uncore)->funcs.mmio_readb = x##_read8; \
 	(uncore)->funcs.mmio_readw = x##_read16; \

-:151: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'uncore' - possible side-effects?
#151: FILE: drivers/gpu/drm/i915/intel_uncore.c:1280:
+#define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \
+do { \
+	ASSIGN_RAW_WRITE_MMIO_VFUNCS((uncore), x); \
+	(uncore)->funcs.write_fw_domains = x##_reg_write_fw_domains; \
+} while (0)

-:157: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'uncore' - possible side-effects?
#157: FILE: drivers/gpu/drm/i915/intel_uncore.c:1286:
+#define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \
+do { \
+	ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x); \
+	(uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \
+} while (0)

total: 0 errors, 0 warnings, 7 checks, 258 lines checked
64e9e429a365 drm/i915: kill uncore_sanitize
a33912a9c7bb drm/i915: kill uncore_to_i915
7c1c30e3557c drm/i915: skip forcewake actions on forcewake-less uncore
-:246: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#246: FILE: drivers/gpu/drm/i915/intel_uncore.c:1691:
+		iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(

total: 0 errors, 0 warnings, 1 checks, 224 lines checked
6186c2ceab1a drm/i915: dynamically allocate forcewake domains
776298c3ec6b drm/i915/gvt: decouple check_vgpu() from uncore_init()

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✓ Fi.CI.BAT: success for Display uncore prep patches (rev2)

[Patchwork]

== Series Details ==

Series: Display uncore prep patches (rev2)
URL   : https://patchwork.freedesktop.org/series/62232/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6312 -> Patchwork_13357
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/

Known issues
------------

  Here are the changes found in Patchwork_13357 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-cfl-8109u:       [PASS][1] -> [FAIL][2] ([fdo#103375])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-cfl-8109u/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-cfl-8109u/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u2:          [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#108569])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-icl-u2/igt@i915_selftest@live_hangcheck.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [INCOMPLETE][5] ([fdo#107718]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_selftest@live_contexts:
    - fi-skl-gvtdvm:      [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][9] ([fdo#109485]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [FAIL][11] ([fdo#103167]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
  [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235


Participating hosts (49 -> 46)
------------------------------

  Additional (5): fi-cml-u2 fi-bxt-j4205 fi-gdg-551 fi-icl-dsi fi-cml-u 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_6312 -> Patchwork_13357

  CI_DRM_6312: 034e3ac6a2d180d188da927388b60c7e62c5655b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5061: c88ced79a7b71aec58f1d9c5c599ac2f431bcf7a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13357: 776298c3ec6b6f35479ec3ca194c3f11e809b916 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

776298c3ec6b drm/i915/gvt: decouple check_vgpu() from uncore_init()
6186c2ceab1a drm/i915: dynamically allocate forcewake domains
7c1c30e3557c drm/i915: skip forcewake actions on forcewake-less uncore
a33912a9c7bb drm/i915: kill uncore_to_i915
64e9e429a365 drm/i915: kill uncore_sanitize
d925fdfca22c drm/i915: use vfuncs for reg_read/write_fw_domains

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/
_______________________________________________
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Re: ✓ Fi.CI.BAT: success for Display uncore prep patches (rev2)

[Tvrtko Ursulin]

On 20/06/2019 02:44, Patchwork wrote:
> == Series Details ==
> 
> Series: Display uncore prep patches (rev2)
> URL   : https://patchwork.freedesktop.org/series/62232/
> State : success
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_6312 -> Patchwork_13357
> ====================================================
> 
> Summary
> -------
> 
>    **SUCCESS**
> 
>    No regressions found.
> 
>    External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/
> 
> Known issues
> ------------
> 
>    Here are the changes found in Patchwork_13357 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>    * igt@gem_exec_suspend@basic-s3:
>      - fi-cfl-8109u:       [PASS][1] -> [FAIL][2] ([fdo#103375])
>     [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-cfl-8109u/igt@gem_exec_suspend@basic-s3.html
>     [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-cfl-8109u/igt@gem_exec_suspend@basic-s3.html
> 
>    * igt@i915_selftest@live_hangcheck:
>      - fi-icl-u2:          [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#108569])
>     [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
>     [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
> 
>    
> #### Possible fixes ####
> 
>    * igt@gem_exec_suspend@basic-s3:
>      - fi-blb-e6850:       [INCOMPLETE][5] ([fdo#107718]) -> [PASS][6]
>     [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
>     [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
> 
>    * igt@i915_selftest@live_contexts:
>      - fi-skl-gvtdvm:      [DMESG-FAIL][7] ([fdo#110235]) -> [PASS][8]
>     [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
>     [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-skl-gvtdvm/igt@i915_selftest@live_contexts.html
> 
>    * igt@kms_chamelium@hdmi-hpd-fast:
>      - fi-kbl-7500u:       [FAIL][9] ([fdo#109485]) -> [PASS][10]
>     [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
>     [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
> 
>    * igt@kms_frontbuffer_tracking@basic:
>      - fi-icl-u2:          [FAIL][11] ([fdo#103167]) -> [PASS][12]
>     [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
>     [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
> 
>    
>    [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>    [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
>    [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
>    [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
>    [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
>    [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
>    [fdo#110235]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
> 
> 
> Participating hosts (49 -> 46)
> ------------------------------
> 
>    Additional (5): fi-cml-u2 fi-bxt-j4205 fi-gdg-551 fi-icl-dsi fi-cml-u
>    Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
> 
> 
> Build changes
> -------------
> 
>    * Linux: CI_DRM_6312 -> Patchwork_13357
> 
>    CI_DRM_6312: 034e3ac6a2d180d188da927388b60c7e62c5655b @ git://anongit.freedesktop.org/gfx-ci/linux
>    IGT_5061: c88ced79a7b71aec58f1d9c5c599ac2f431bcf7a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>    Patchwork_13357: 776298c3ec6b6f35479ec3ca194c3f11e809b916 @ git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> 776298c3ec6b drm/i915/gvt: decouple check_vgpu() from uncore_init()
> 6186c2ceab1a drm/i915: dynamically allocate forcewake domains
> 7c1c30e3557c drm/i915: skip forcewake actions on forcewake-less uncore
> a33912a9c7bb drm/i915: kill uncore_to_i915
> 64e9e429a365 drm/i915: kill uncore_sanitize
> d925fdfca22c drm/i915: use vfuncs for reg_read/write_fw_domains

Pushed, thanks for patches and reviews.

Regards,

Tvrtko


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✓ Fi.CI.IGT: success for Display uncore prep patches (rev2)

[Patchwork]

== Series Details ==

Series: Display uncore prep patches (rev2)
URL   : https://patchwork.freedesktop.org/series/62232/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6312_full -> Patchwork_13357_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_13357_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_eio@in-flight-suspend:
    - shard-kbl:          [PASS][1] -> [DMESG-WARN][2] ([fdo#110913 ]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl3/igt@gem_eio@in-flight-suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-kbl6/igt@gem_eio@in-flight-suspend.html

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          [PASS][3] -> [FAIL][4] ([fdo#109661])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb5/igt@gem_eio@unwedge-stress.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-snb2/igt@gem_eio@unwedge-stress.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
    - shard-snb:          [PASS][5] -> [DMESG-WARN][6] ([fdo#110789] / [fdo#110913 ])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb6/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-snb7/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108686])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl8/igt@gem_tiled_swapping@non-threaded.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-apl1/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_suspend@debugfs-reader:
    - shard-apl:          [PASS][9] -> [DMESG-WARN][10] ([fdo#108566]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl2/igt@i915_suspend@debugfs-reader.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-apl5/igt@i915_suspend@debugfs-reader.html

  * igt@i915_suspend@sysfs-reader:
    - shard-kbl:          [PASS][11] -> [INCOMPLETE][12] ([fdo#103665] / [fdo#108767])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl4/igt@i915_suspend@sysfs-reader.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-kbl2/igt@i915_suspend@sysfs-reader.html

  * igt@kms_atomic_transition@1x-modeset-transitions-fencing:
    - shard-snb:          [PASS][13] -> [SKIP][14] ([fdo#109271])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb1/igt@kms_atomic_transition@1x-modeset-transitions-fencing.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-snb2/igt@kms_atomic_transition@1x-modeset-transitions-fencing.html

  * igt@kms_flip@2x-plain-flip:
    - shard-hsw:          [PASS][15] -> [SKIP][16] ([fdo#109271]) +17 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-hsw5/igt@kms_flip@2x-plain-flip.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-hsw1/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [PASS][17] -> [INCOMPLETE][18] ([fdo#109507])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl8/igt@kms_flip@flip-vs-suspend.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-skl8/igt@kms_flip@flip-vs-suspend.html
    - shard-glk:          [PASS][19] -> [INCOMPLETE][20] ([fdo#103359] / [k.org#198133])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-glk9/igt@kms_flip@flip-vs-suspend.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-glk4/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [PASS][21] -> [INCOMPLETE][22] ([fdo#103540])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-hsw8/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([fdo#103191])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl3/igt@kms_pipe_crc_basic@hang-read-crc-pipe-c.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-skl4/igt@kms_pipe_crc_basic@hang-read-crc-pipe-c.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-kbl:          [PASS][25] -> [INCOMPLETE][26] ([fdo#103665])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([fdo#108145]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][29] -> [FAIL][30] ([fdo#99912])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl6/igt@kms_setmode@basic.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-apl2/igt@kms_setmode@basic.html

  * igt@kms_sysfs_edid_timing:
    - shard-hsw:          [PASS][31] -> [FAIL][32] ([fdo#100047])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-hsw6/igt@kms_sysfs_edid_timing.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-hsw1/igt@kms_sysfs_edid_timing.html

  * igt@perf_pmu@rc6:
    - shard-kbl:          [PASS][33] -> [SKIP][34] ([fdo#109271])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl7/igt@perf_pmu@rc6.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-kbl7/igt@perf_pmu@rc6.html

  
#### Possible fixes ####

  * igt@gem_eio@wait-10ms:
    - shard-apl:          [DMESG-WARN][35] ([fdo#110913 ]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl8/igt@gem_eio@wait-10ms.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-apl1/igt@gem_eio@wait-10ms.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-snb:          [DMESG-WARN][37] ([fdo#110789] / [fdo#110913 ]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-snb6/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-kbl:          [DMESG-WARN][39] ([fdo#110913 ]) -> [PASS][40] +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-kbl2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@kms_cursor_edge_walk@pipe-b-128x128-top-edge:
    - shard-snb:          [SKIP][41] ([fdo#109271] / [fdo#109278]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb2/igt@kms_cursor_edge_walk@pipe-b-128x128-top-edge.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-snb1/igt@kms_cursor_edge_walk@pipe-b-128x128-top-edge.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-glk:          [FAIL][43] ([fdo#104873]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-hsw:          [SKIP][45] ([fdo#109271]) -> [PASS][46] +26 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-hsw1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-hsw6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [DMESG-WARN][47] ([fdo#108566]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-apl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-apl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-skl:          [INCOMPLETE][49] ([fdo#104108]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
    - shard-snb:          [SKIP][51] ([fdo#109271]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-snb2/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-snb1/igt@kms_plane@plane-panning-bottom-right-pipe-b-planes.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [FAIL][53] ([fdo#99912]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-kbl1/igt@kms_setmode@basic.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-kbl4/igt@kms_setmode@basic.html

  
#### Warnings ####

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-skl:          [FAIL][55] ([fdo#108040]) -> [FAIL][56] ([fdo#103167])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-skl10/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-skl:          [FAIL][57] ([fdo#103167]) -> [FAIL][58] ([fdo#108040])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6312/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  
  [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
  [fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110913 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110913 
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 9)
------------------------------

  Missing    (1): shard-iclb 


Build changes
-------------

  * Linux: CI_DRM_6312 -> Patchwork_13357

  CI_DRM_6312: 034e3ac6a2d180d188da927388b60c7e62c5655b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5061: c88ced79a7b71aec58f1d9c5c599ac2f431bcf7a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13357: 776298c3ec6b6f35479ec3ca194c3f11e809b916 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13357/
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