From: "André Draszik" <git@andred.net>
To: linux-kernel@vger.kernel.org
Cc: "André Draszik" <git@andred.net>,
"Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org
Subject: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D
Date: Tue, 13 Aug 2019 11:37:59 +0100 [thread overview]
Message-ID: <20190813103759.38358-2-git@andred.net> (raw)
In-Reply-To: <20190813103759.38358-1-git@andred.net>
The i.MX7D variant of the IP can use either an external
crystal oscillator input or an internal clock input as
a reference clock input for the PCIe PHY.
Document the optional property 'fsl,pcie-phy-refclk-internal'
Signed-off-by: André Draszik <git@andred.net>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index a7f5f5afa0e6..985d7083df9f 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie:
- "turnoff"
- fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node.
+Additional optional properties for imx7d-pcie:
+- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used
+ as PCIe PHY reference clock source. By default an external ocsillator input
+ is used.
+
Additional required properties for imx8mq-pcie:
- clock-names: Must include the following additional entries:
- "pcie_aux"
--
2.23.0.rc1
WARNING: multiple messages have this Message-ID (diff)
From: "André Draszik" <git@andred.net>
To: linux-kernel@vger.kernel.org
Cc: "Mark Rutland" <mark.rutland@arm.com>,
devicetree@vger.kernel.org, "Fabio Estevam" <festevam@gmail.com>,
"Richard Zhu" <hongxing.zhu@nxp.com>,
"André Draszik" <git@andred.net>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
linux-pci@vger.kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
linux-arm-kernel@lists.infradead.org,
"Lucas Stach" <l.stach@pengutronix.de>
Subject: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl, pcie-phy-refclk-internal" for i.MX7D
Date: Tue, 13 Aug 2019 11:37:59 +0100 [thread overview]
Message-ID: <20190813103759.38358-2-git@andred.net> (raw)
In-Reply-To: <20190813103759.38358-1-git@andred.net>
The i.MX7D variant of the IP can use either an external
crystal oscillator input or an internal clock input as
a reference clock input for the PCIe PHY.
Document the optional property 'fsl,pcie-phy-refclk-internal'
Signed-off-by: André Draszik <git@andred.net>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index a7f5f5afa0e6..985d7083df9f 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie:
- "turnoff"
- fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node.
+Additional optional properties for imx7d-pcie:
+- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used
+ as PCIe PHY reference clock source. By default an external ocsillator input
+ is used.
+
Additional required properties for imx8mq-pcie:
- clock-names: Must include the following additional entries:
- "pcie_aux"
--
2.23.0.rc1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-08-13 10:38 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-13 10:37 [PATCH 1/2] PCIe: imx6: imx7d: add support for internal phy refclk source André Draszik
2019-08-13 10:37 ` André Draszik
2019-08-13 10:37 ` André Draszik [this message]
2019-08-13 10:37 ` [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl, pcie-phy-refclk-internal" for i.MX7D André Draszik
2019-08-27 15:56 ` [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" " Rob Herring
2019-08-27 15:56 ` Rob Herring
2019-08-27 15:56 ` Rob Herring
2019-08-28 8:17 ` André Draszik
2019-08-28 8:17 ` André Draszik
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