* [PATCH 1/2] PCIe: imx6: imx7d: add support for internal phy refclk source @ 2019-08-13 10:37 ` André Draszik 0 siblings, 0 replies; 9+ messages in thread From: André Draszik @ 2019-08-13 10:37 UTC (permalink / raw) To: linux-kernel Cc: André Draszik, Richard Zhu, Lucas Stach, Lorenzo Pieralisi, Bjorn Helgaas, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, linux-pci, linux-arm-kernel The i.MX7D variant of the IP can use either an external crystal oscillator input or an internal clock input as a reference clock input for the PCIe PHY. Add support for an optional property 'fsl,pcie-phy-refclk-internal' If present then the internal clock input is used as PCIe PHY reference clock source. The previous default of using an external ocsillator input (if the property doesn't exist), doesn't change. Signed-off-by: André Draszik <git@andred.net> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- drivers/pci/controller/dwc/pci-imx6.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 9b5cb5b70389..bb3700c9157c 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -63,6 +63,7 @@ struct imx6_pcie { struct dw_pcie *pci; int reset_gpio; bool gpio_active_high; + bool phy_refclk_internal; struct clk *pcie_bus; struct clk *pcie_phy; struct clk *pcie_inbound_axi; @@ -635,7 +636,10 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) break; case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, + imx6_pcie->phy_refclk_internal + ? IMX7D_GPR12_PCIE_PHY_REFCLK_SEL + : 0); break; case IMX6SX: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -1171,6 +1175,9 @@ static int imx6_pcie_probe(struct platform_device *pdev) if (ret) imx6_pcie->link_gen = 1; + imx6_pcie->phy_refclk_internal = + of_property_read_bool(node, "fsl,pcie-phy-refclk-internal"); + imx6_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie"); if (IS_ERR(imx6_pcie->vpcie)) { if (PTR_ERR(imx6_pcie->vpcie) == -EPROBE_DEFER) -- 2.23.0.rc1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 1/2] PCIe: imx6: imx7d: add support for internal phy refclk source @ 2019-08-13 10:37 ` André Draszik 0 siblings, 0 replies; 9+ messages in thread From: André Draszik @ 2019-08-13 10:37 UTC (permalink / raw) To: linux-kernel Cc: Lorenzo Pieralisi, Richard Zhu, André Draszik, Sascha Hauer, Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team, linux-pci, Bjorn Helgaas, Shawn Guo, linux-arm-kernel, Lucas Stach The i.MX7D variant of the IP can use either an external crystal oscillator input or an internal clock input as a reference clock input for the PCIe PHY. Add support for an optional property 'fsl,pcie-phy-refclk-internal' If present then the internal clock input is used as PCIe PHY reference clock source. The previous default of using an external ocsillator input (if the property doesn't exist), doesn't change. Signed-off-by: André Draszik <git@andred.net> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- drivers/pci/controller/dwc/pci-imx6.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 9b5cb5b70389..bb3700c9157c 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -63,6 +63,7 @@ struct imx6_pcie { struct dw_pcie *pci; int reset_gpio; bool gpio_active_high; + bool phy_refclk_internal; struct clk *pcie_bus; struct clk *pcie_phy; struct clk *pcie_inbound_axi; @@ -635,7 +636,10 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) break; case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, + imx6_pcie->phy_refclk_internal + ? IMX7D_GPR12_PCIE_PHY_REFCLK_SEL + : 0); break; case IMX6SX: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -1171,6 +1175,9 @@ static int imx6_pcie_probe(struct platform_device *pdev) if (ret) imx6_pcie->link_gen = 1; + imx6_pcie->phy_refclk_internal = + of_property_read_bool(node, "fsl,pcie-phy-refclk-internal"); + imx6_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie"); if (IS_ERR(imx6_pcie->vpcie)) { if (PTR_ERR(imx6_pcie->vpcie) == -EPROBE_DEFER) -- 2.23.0.rc1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D 2019-08-13 10:37 ` André Draszik @ 2019-08-13 10:37 ` André Draszik -1 siblings, 0 replies; 9+ messages in thread From: André Draszik @ 2019-08-13 10:37 UTC (permalink / raw) To: linux-kernel Cc: André Draszik, Richard Zhu, Lucas Stach, Bjorn Helgaas, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, linux-pci, linux-arm-kernel, devicetree The i.MX7D variant of the IP can use either an external crystal oscillator input or an internal clock input as a reference clock input for the PCIe PHY. Document the optional property 'fsl,pcie-phy-refclk-internal' Signed-off-by: André Draszik <git@andred.net> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index a7f5f5afa0e6..985d7083df9f 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: - "turnoff" - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. +Additional optional properties for imx7d-pcie: +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used + as PCIe PHY reference clock source. By default an external ocsillator input + is used. + Additional required properties for imx8mq-pcie: - clock-names: Must include the following additional entries: - "pcie_aux" -- 2.23.0.rc1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl, pcie-phy-refclk-internal" for i.MX7D @ 2019-08-13 10:37 ` André Draszik 0 siblings, 0 replies; 9+ messages in thread From: André Draszik @ 2019-08-13 10:37 UTC (permalink / raw) To: linux-kernel Cc: Mark Rutland, devicetree, Fabio Estevam, Richard Zhu, André Draszik, Sascha Hauer, Rob Herring, NXP Linux Team, Pengutronix Kernel Team, linux-pci, Bjorn Helgaas, Shawn Guo, linux-arm-kernel, Lucas Stach The i.MX7D variant of the IP can use either an external crystal oscillator input or an internal clock input as a reference clock input for the PCIe PHY. Document the optional property 'fsl,pcie-phy-refclk-internal' Signed-off-by: André Draszik <git@andred.net> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index a7f5f5afa0e6..985d7083df9f 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: - "turnoff" - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. +Additional optional properties for imx7d-pcie: +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used + as PCIe PHY reference clock source. By default an external ocsillator input + is used. + Additional required properties for imx8mq-pcie: - clock-names: Must include the following additional entries: - "pcie_aux" -- 2.23.0.rc1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D 2019-08-13 10:37 ` [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl, pcie-phy-refclk-internal" " André Draszik (?) @ 2019-08-27 15:56 ` Rob Herring -1 siblings, 0 replies; 9+ messages in thread From: Rob Herring @ 2019-08-27 15:56 UTC (permalink / raw) To: André Draszik Cc: linux-kernel, Richard Zhu, Lucas Stach, Bjorn Helgaas, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, linux-pci, linux-arm-kernel, devicetree On Tue, Aug 13, 2019 at 11:37:59AM +0100, André Draszik wrote: > The i.MX7D variant of the IP can use either an external > crystal oscillator input or an internal clock input as > a reference clock input for the PCIe PHY. > > Document the optional property 'fsl,pcie-phy-refclk-internal' > > Signed-off-by: André Draszik <git@andred.net> > Cc: Richard Zhu <hongxing.zhu@nxp.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Bjorn Helgaas <bhelgaas@google.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Sascha Hauer <s.hauer@pengutronix.de> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > Cc: Fabio Estevam <festevam@gmail.com> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: linux-pci@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index a7f5f5afa0e6..985d7083df9f 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: > - "turnoff" > - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. Not sure how this got in, but why is the phy binding not used here? > > +Additional optional properties for imx7d-pcie: > +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used > + as PCIe PHY reference clock source. By default an external ocsillator input > + is used. Can't the clock binding and maybe 'assigned-clocks' be used here? Also, this is a property of the PHY, so it belongs in the PHY's node. Rob ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D @ 2019-08-27 15:56 ` Rob Herring 0 siblings, 0 replies; 9+ messages in thread From: Rob Herring @ 2019-08-27 15:56 UTC (permalink / raw) To: André Draszik Cc: Mark Rutland, devicetree, Richard Zhu, Fabio Estevam, Sascha Hauer, linux-kernel, NXP Linux Team, Pengutronix Kernel Team, linux-pci, Bjorn Helgaas, Shawn Guo, linux-arm-kernel, Lucas Stach On Tue, Aug 13, 2019 at 11:37:59AM +0100, André Draszik wrote: > The i.MX7D variant of the IP can use either an external > crystal oscillator input or an internal clock input as > a reference clock input for the PCIe PHY. > > Document the optional property 'fsl,pcie-phy-refclk-internal' > > Signed-off-by: André Draszik <git@andred.net> > Cc: Richard Zhu <hongxing.zhu@nxp.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Bjorn Helgaas <bhelgaas@google.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Sascha Hauer <s.hauer@pengutronix.de> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > Cc: Fabio Estevam <festevam@gmail.com> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: linux-pci@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index a7f5f5afa0e6..985d7083df9f 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: > - "turnoff" > - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. Not sure how this got in, but why is the phy binding not used here? > > +Additional optional properties for imx7d-pcie: > +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used > + as PCIe PHY reference clock source. By default an external ocsillator input > + is used. Can't the clock binding and maybe 'assigned-clocks' be used here? Also, this is a property of the PHY, so it belongs in the PHY's node. Rob ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D @ 2019-08-27 15:56 ` Rob Herring 0 siblings, 0 replies; 9+ messages in thread From: Rob Herring @ 2019-08-27 15:56 UTC (permalink / raw) To: André Draszik Cc: Mark Rutland, devicetree, Richard Zhu, Fabio Estevam, Sascha Hauer, linux-kernel, NXP Linux Team, Pengutronix Kernel Team, linux-pci, Bjorn Helgaas, Shawn Guo, linux-arm-kernel, Lucas Stach On Tue, Aug 13, 2019 at 11:37:59AM +0100, André Draszik wrote: > The i.MX7D variant of the IP can use either an external > crystal oscillator input or an internal clock input as > a reference clock input for the PCIe PHY. > > Document the optional property 'fsl,pcie-phy-refclk-internal' > > Signed-off-by: André Draszik <git@andred.net> > Cc: Richard Zhu <hongxing.zhu@nxp.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Bjorn Helgaas <bhelgaas@google.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Sascha Hauer <s.hauer@pengutronix.de> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > Cc: Fabio Estevam <festevam@gmail.com> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: linux-pci@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index a7f5f5afa0e6..985d7083df9f 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: > - "turnoff" > - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. Not sure how this got in, but why is the phy binding not used here? > > +Additional optional properties for imx7d-pcie: > +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used > + as PCIe PHY reference clock source. By default an external ocsillator input > + is used. Can't the clock binding and maybe 'assigned-clocks' be used here? Also, this is a property of the PHY, so it belongs in the PHY's node. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D 2019-08-27 15:56 ` Rob Herring @ 2019-08-28 8:17 ` André Draszik -1 siblings, 0 replies; 9+ messages in thread From: André Draszik @ 2019-08-28 8:17 UTC (permalink / raw) To: Rob Herring Cc: linux-kernel, Richard Zhu, Lucas Stach, Bjorn Helgaas, Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, linux-pci, linux-arm-kernel, devicetree Hi Rob, On Tue, 2019-08-27 at 10:56 -0500, Rob Herring wrote: > On Tue, Aug 13, 2019 at 11:37:59AM +0100, André Draszik wrote: > > The i.MX7D variant of the IP can use either an external > > crystal oscillator input or an internal clock input as > > a reference clock input for the PCIe PHY. > > > > Document the optional property 'fsl,pcie-phy-refclk-internal' > > > > Signed-off-by: André Draszik <git@andred.net> > > Cc: Richard Zhu <hongxing.zhu@nxp.com> > > Cc: Lucas Stach <l.stach@pengutronix.de> > > Cc: Bjorn Helgaas <bhelgaas@google.com> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Mark Rutland <mark.rutland@arm.com> > > Cc: Shawn Guo <shawnguo@kernel.org> > > Cc: Sascha Hauer <s.hauer@pengutronix.de> > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > > Cc: Fabio Estevam <festevam@gmail.com> > > Cc: NXP Linux Team <linux-imx@nxp.com> > > Cc: linux-pci@vger.kernel.org > > Cc: linux-arm-kernel@lists.infradead.org > > Cc: devicetree@vger.kernel.org > > Cc: linux-kernel@vger.kernel.org > > --- > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > index a7f5f5afa0e6..985d7083df9f 100644 > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: > > - "turnoff" > > - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. > > Not sure how this got in, but why is the phy binding not used here? > > > > > +Additional optional properties for imx7d-pcie: > > +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used > > + as PCIe PHY reference clock source. By default an external ocsillator input > > + is used. > > Can't the clock binding and maybe 'assigned-clocks' be used here? > > Also, this is a property of the PHY, so it belongs in the PHY's node. Thanks for pointing this out. I'll have a look. Andre' ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D @ 2019-08-28 8:17 ` André Draszik 0 siblings, 0 replies; 9+ messages in thread From: André Draszik @ 2019-08-28 8:17 UTC (permalink / raw) To: Rob Herring Cc: Mark Rutland, devicetree, Richard Zhu, Fabio Estevam, Sascha Hauer, linux-kernel, NXP Linux Team, Pengutronix Kernel Team, linux-pci, Bjorn Helgaas, Shawn Guo, linux-arm-kernel, Lucas Stach Hi Rob, On Tue, 2019-08-27 at 10:56 -0500, Rob Herring wrote: > On Tue, Aug 13, 2019 at 11:37:59AM +0100, André Draszik wrote: > > The i.MX7D variant of the IP can use either an external > > crystal oscillator input or an internal clock input as > > a reference clock input for the PCIe PHY. > > > > Document the optional property 'fsl,pcie-phy-refclk-internal' > > > > Signed-off-by: André Draszik <git@andred.net> > > Cc: Richard Zhu <hongxing.zhu@nxp.com> > > Cc: Lucas Stach <l.stach@pengutronix.de> > > Cc: Bjorn Helgaas <bhelgaas@google.com> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Mark Rutland <mark.rutland@arm.com> > > Cc: Shawn Guo <shawnguo@kernel.org> > > Cc: Sascha Hauer <s.hauer@pengutronix.de> > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > > Cc: Fabio Estevam <festevam@gmail.com> > > Cc: NXP Linux Team <linux-imx@nxp.com> > > Cc: linux-pci@vger.kernel.org > > Cc: linux-arm-kernel@lists.infradead.org > > Cc: devicetree@vger.kernel.org > > Cc: linux-kernel@vger.kernel.org > > --- > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > index a7f5f5afa0e6..985d7083df9f 100644 > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > > @@ -56,6 +56,11 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: > > - "turnoff" > > - fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. > > Not sure how this got in, but why is the phy binding not used here? > > > > > +Additional optional properties for imx7d-pcie: > > +- fsl,pcie-phy-refclk-internal: If present then an internal PLL input is used > > + as PCIe PHY reference clock source. By default an external ocsillator input > > + is used. > > Can't the clock binding and maybe 'assigned-clocks' be used here? > > Also, this is a property of the PHY, so it belongs in the PHY's node. Thanks for pointing this out. I'll have a look. Andre' _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-08-28 8:17 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-08-13 10:37 [PATCH 1/2] PCIe: imx6: imx7d: add support for internal phy refclk source André Draszik 2019-08-13 10:37 ` André Draszik 2019-08-13 10:37 ` [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" for i.MX7D André Draszik 2019-08-13 10:37 ` [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl, pcie-phy-refclk-internal" " André Draszik 2019-08-27 15:56 ` [PATCH 2/2] dt-bindings: imx6q-pcie: add "fsl,pcie-phy-refclk-internal" " Rob Herring 2019-08-27 15:56 ` Rob Herring 2019-08-27 15:56 ` Rob Herring 2019-08-28 8:17 ` André Draszik 2019-08-28 8:17 ` André Draszik
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.