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From: Thierry Reding <thierry.reding@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	robh+dt@kernel.org, jonathanh@nvidia.com, kishon@ti.com,
	gustavo.pimentel@synopsys.com, digetx@gmail.com,
	mperttunen@nvidia.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform
Date: Wed, 28 Aug 2019 11:10:28 +0200	[thread overview]
Message-ID: <20190828091028.GB2917@ulmo> (raw)
In-Reply-To: <20190826073143.4582-1-vidyas@nvidia.com>

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On Mon, Aug 26, 2019 at 01:01:37PM +0530, Vidya Sagar wrote:
> This patch series enables Tegra194's C5 controller which owns x16 slot in
> p2972-0000 platform. C5 controller's PERST# and CLKREQ# are not configured as
> output and bi-directional signals by default and hence they need to be
> configured explicitly. Also, x16 slot's 3.3V and 12V supplies are controlled
> through GPIOs and hence they need to be enabled through regulator framework.
> This patch series adds required infrastructural support to address both the
> aforementioned requirements.
> Testing done on p2972-0000 platform
> - Able to enumerate devices connected to x16 slot (owned by C5 controller)
> - Enumerated device's functionality verified
> - Suspend-Resume sequence is verified with device connected to x16 slot
> 
> Vidya Sagar (6):
>   dt-bindings: PCI: tegra: Add sideband pins configuration entries
>   arm64: tegra: Add configuration for PCIe C5 sideband signals
>   PCI: tegra: Add support to configure sideband pins
>   dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries
>   arm64: tegra: Add PCIe slot supply information in p2972-0000 platform
>   PCI: tegra: Add support to enable slot regulators

Hi Vidya,

when you resend with review comments addressed, can you please reorder
the patches slightly? I think it's more natural to order them like this:

    dt-bindings: PCI: tegra: Add sideband pins configuration entries
    PCI: tegra: Add support to configure sideband pins
    dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries
    PCI: tegra: Add support to enable slot regulators
    arm64: tegra: Add configuration for PCIe C5 sideband signals
    arm64: tegra: Add PCIe slot supply information in p2972-0000 platform

Or perhaps even like this:

    dt-bindings: PCI: tegra: Add sideband pins configuration entries
    dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries
    PCI: tegra: Add support to configure sideband pins
    PCI: tegra: Add support to enable slot regulators
    arm64: tegra: Add configuration for PCIe C5 sideband signals
    arm64: tegra: Add PCIe slot supply information in p2972-0000 platform

That makes it more obvious that patches 1-2 need an Acked-by from Rob
and patches 1-4 need to go through Lorenzo's tree and that I'll pick up
patches 5-6.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
	mperttunen@nvidia.com, mmaddireddy@nvidia.com, kthota@nvidia.com,
	gustavo.pimentel@synopsys.com, linux-kernel@vger.kernel.org,
	kishon@ti.com, linux-tegra@vger.kernel.org, robh+dt@kernel.org,
	linux-pci@vger.kernel.org, bhelgaas@google.com, digetx@gmail.com,
	jonathanh@nvidia.com, linux-arm-kernel@lists.infradead.org,
	sagar.tv@gmail.com
Subject: Re: [PATCH 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform
Date: Wed, 28 Aug 2019 11:10:28 +0200	[thread overview]
Message-ID: <20190828091028.GB2917@ulmo> (raw)
In-Reply-To: <20190826073143.4582-1-vidyas@nvidia.com>


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On Mon, Aug 26, 2019 at 01:01:37PM +0530, Vidya Sagar wrote:
> This patch series enables Tegra194's C5 controller which owns x16 slot in
> p2972-0000 platform. C5 controller's PERST# and CLKREQ# are not configured as
> output and bi-directional signals by default and hence they need to be
> configured explicitly. Also, x16 slot's 3.3V and 12V supplies are controlled
> through GPIOs and hence they need to be enabled through regulator framework.
> This patch series adds required infrastructural support to address both the
> aforementioned requirements.
> Testing done on p2972-0000 platform
> - Able to enumerate devices connected to x16 slot (owned by C5 controller)
> - Enumerated device's functionality verified
> - Suspend-Resume sequence is verified with device connected to x16 slot
> 
> Vidya Sagar (6):
>   dt-bindings: PCI: tegra: Add sideband pins configuration entries
>   arm64: tegra: Add configuration for PCIe C5 sideband signals
>   PCI: tegra: Add support to configure sideband pins
>   dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries
>   arm64: tegra: Add PCIe slot supply information in p2972-0000 platform
>   PCI: tegra: Add support to enable slot regulators

Hi Vidya,

when you resend with review comments addressed, can you please reorder
the patches slightly? I think it's more natural to order them like this:

    dt-bindings: PCI: tegra: Add sideband pins configuration entries
    PCI: tegra: Add support to configure sideband pins
    dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries
    PCI: tegra: Add support to enable slot regulators
    arm64: tegra: Add configuration for PCIe C5 sideband signals
    arm64: tegra: Add PCIe slot supply information in p2972-0000 platform

Or perhaps even like this:

    dt-bindings: PCI: tegra: Add sideband pins configuration entries
    dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries
    PCI: tegra: Add support to configure sideband pins
    PCI: tegra: Add support to enable slot regulators
    arm64: tegra: Add configuration for PCIe C5 sideband signals
    arm64: tegra: Add PCIe slot supply information in p2972-0000 platform

That makes it more obvious that patches 1-2 need an Acked-by from Rob
and patches 1-4 need to go through Lorenzo's tree and that I'll pick up
patches 5-6.

Thierry

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  parent reply	other threads:[~2019-08-28  9:10 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-26  7:31 [PATCH 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform Vidya Sagar
2019-08-26  7:31 ` Vidya Sagar
2019-08-26  7:31 ` Vidya Sagar
2019-08-26  7:31 ` [PATCH 1/6] dt-bindings: PCI: tegra: Add sideband pins configuration entries Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31 ` [PATCH 2/6] arm64: tegra: Add configuration for PCIe C5 sideband signals Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31 ` [PATCH 3/6] PCI: tegra: Add support to configure sideband pins Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-27 15:30   ` Andrew Murray
2019-08-27 15:30     ` Andrew Murray
2019-08-27 15:40     ` Vidya Sagar
2019-08-27 15:40       ` Vidya Sagar
2019-08-27 15:40       ` Vidya Sagar
2019-08-26  7:31 ` [PATCH 4/6] dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31 ` [PATCH 5/6] arm64: tegra: Add PCIe slot supply information in p2972-0000 platform Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31 ` [PATCH 6/6] PCI: tegra: Add support to enable slot regulators Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-26  7:31   ` Vidya Sagar
2019-08-27 15:47   ` Andrew Murray
2019-08-27 15:47     ` Andrew Murray
2019-08-27 16:24     ` Vidya Sagar
2019-08-27 16:24       ` Vidya Sagar
2019-08-27 16:24       ` Vidya Sagar
2019-08-27 17:13       ` Andrew Murray
2019-08-27 17:13         ` Andrew Murray
2019-08-28  9:07         ` Thierry Reding
2019-08-28  9:07           ` Thierry Reding
2019-08-28  9:37           ` Andrew Murray
2019-08-28  9:37             ` Andrew Murray
2019-08-28  9:10 ` Thierry Reding [this message]
2019-08-28  9:10   ` [PATCH 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform Thierry Reding
2019-08-28 10:04   ` Vidya Sagar
2019-08-28 10:04     ` Vidya Sagar
2019-08-28 10:04     ` Vidya Sagar

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