Re: [PATCH 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency

[Stephen Boyd <sboyd@kernel.org>]

Quoting Jorge Ramirez (2019-09-05 00:30:42)
> On 8/26/19 18:45, Jorge Ramirez-Ortiz wrote:
> > Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
> > specifications.
> > 
> > Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
> > Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
> > Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Acked-by: Stephen Boyd <sboyd@kernel.org>
> > ---
> >  drivers/clk/qcom/clk-alpha-pll.c | 8 ++++++++
> >  drivers/clk/qcom/clk-alpha-pll.h | 1 +
> >  drivers/clk/qcom/gcc-qcs404.c    | 2 +-
> >  3 files changed, 10 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> > index 055318f97991..9228b7b1f56e 100644
> > --- a/drivers/clk/qcom/clk-alpha-pll.c
> > +++ b/drivers/clk/qcom/clk-alpha-pll.c
> > @@ -878,6 +878,14 @@ static long clk_trion_pll_round_rate(struct clk_hw *hw, unsigned long rate,
> >       return clamp(rate, min_freq, max_freq);
> >  }
> >  
> > +const struct clk_ops clk_alpha_pll_fixed_ops = {
> > +     .enable = clk_alpha_pll_enable,
> > +     .disable = clk_alpha_pll_disable,
> > +     .is_enabled = clk_alpha_pll_is_enabled,
> > +     .recalc_rate = clk_alpha_pll_recalc_rate,
> > +};
> > +EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);
> > +
> >  const struct clk_ops clk_alpha_pll_ops = {
> >       .enable = clk_alpha_pll_enable,
> >       .disable = clk_alpha_pll_disable,
> > diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
> > index 15f27f4b06df..c28eb1a08c0c 100644
> > --- a/drivers/clk/qcom/clk-alpha-pll.h
> > +++ b/drivers/clk/qcom/clk-alpha-pll.h
> > @@ -109,6 +109,7 @@ struct alpha_pll_config {
> >  };
> >  
> >  extern const struct clk_ops clk_alpha_pll_ops;
> > +extern const struct clk_ops clk_alpha_pll_fixed_ops;
> >  extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
> >  extern const struct clk_ops clk_alpha_pll_postdiv_ops;
> >  extern const struct clk_ops clk_alpha_pll_huayra_ops;
> > diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
> > index e12c04c09a6a..567140709c7d 100644
> > --- a/drivers/clk/qcom/gcc-qcs404.c
> > +++ b/drivers/clk/qcom/gcc-qcs404.c
> > @@ -330,7 +330,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = {
> >                       .parent_names = (const char *[]){ "cxo" },
> >                       .num_parents = 1,
> >                       .flags = CLK_IS_CRITICAL,
> > -                     .ops = &clk_alpha_pll_ops,
> > +                     .ops = &clk_alpha_pll_fixed_ops,
> >               },
> >       },
> >  };
> > 
> 
> just a quick follow up, is this series being picked-up?

No cover letter! ;P

Anyway, I'll pick it up.