From: Stephen Boyd <sboyd@kernel.org>
To: Jorge Ramirez <jorge.ramirez-ortiz@linaro.org>
Cc: agross@kernel.org, mturquette@baylibre.com,
bjorn.andersson@linaro.org, niklas.cassel@linaro.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/5] clk: qcom: apcs-msm8916: get parent clock names from DT
Date: Tue, 10 Sep 2019 03:20:03 -0700 [thread overview]
Message-ID: <20190910102015.1CD3C2081B@mail.kernel.org> (raw)
In-Reply-To: <3517a1e0-6092-362f-f696-fcc1528ce026@linaro.org>
Quoting Jorge Ramirez (2019-09-10 02:40:34)
> On 9/10/19 11:34, Jorge Ramirez wrote:
> > On 9/10/19 11:14, Stephen Boyd wrote:
> >>
> >> This is not a backwards compatible change.
> >>
> >>>>> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> >>>>> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> >>>>> @@ -429,7 +429,8 @@
> >>>>> compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
> >>>>> reg = <0xb011000 0x1000>;
> >>>>> #mbox-cells = <1>;
> >>>>> - clocks = <&a53pll>;
> >>>>> + clocks = <&gcc GPLL0_VOTE>, <&a53pll>;
> >>>>> + clock-names = "aux", "pll";
> >>>>> #clock-cells = <0>;
> >>>>> };
> >>>>>
> >>
> >> Because the "clocks" property changed from
> >>
> >> <&a53pll>
> >>
> >> to
> >>
> >> <&gcc GPLL0_VOTE>, <&a53pll>
> >>
> >> and that moves pll to cell 1 instead of cell 0.
> >>
> >>
> >
> > what do you mean by backwards compatible? because this change does not
> > break previous clients.
>
> as per the comments I added to the code (in case this helps framing the
> discussion)
>
> [..]
> legacy bindings only defined the pll parent clock (index = 0) with no
> name; when both of the parents are specified in the bindings, the
> pll is the second one (index = 1).
The 'clock-names' property is entirely irrelevant to this discussion.
The PLL _must_ be index 0 forever so that the binding is left in a
backwards compatible state. Moving the PLL to index 1 and then using
clock-names to find it is a backwards incompatible change. The order of
clks in the 'clocks' property is an ABI.
next prev parent reply other threads:[~2019-09-10 10:20 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-26 16:45 [PATCH 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez-Ortiz
2019-08-26 16:45 ` [PATCH 2/5] clk: qcom: apcs-msm8916: get parent clock names from DT Jorge Ramirez-Ortiz
2019-09-09 10:21 ` Stephen Boyd
2019-09-09 14:17 ` Jorge Ramirez-Ortiz, Linaro
2019-09-09 16:17 ` Stephen Boyd
2019-09-09 16:54 ` Jorge Ramirez-Ortiz, Linaro
2019-09-10 9:14 ` Stephen Boyd
2019-09-10 9:34 ` Jorge Ramirez
2019-09-10 9:40 ` Jorge Ramirez
2019-09-10 10:20 ` Stephen Boyd [this message]
2019-09-09 10:23 ` Stephen Boyd
2019-08-26 16:45 ` [PATCH 3/5] clk: qcom: hfpll: " Jorge Ramirez-Ortiz
2019-09-09 10:22 ` Stephen Boyd
2019-08-26 16:45 ` [PATCH 4/5] clk: qcom: hfpll: register as clock provider Jorge Ramirez-Ortiz
2019-09-09 10:22 ` Stephen Boyd
2019-08-26 16:45 ` [PATCH 5/5] clk: qcom: hfpll: CLK_IGNORE_UNUSED Jorge Ramirez-Ortiz
2019-09-09 10:23 ` Stephen Boyd
2019-09-05 7:30 ` [PATCH 1/5] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez
2019-09-09 10:05 ` Stephen Boyd
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