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From: Ramalingam C <ramalingam.c@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: Ap Kamal <kamal.ap@intel.com>,
	intel-gfx@lists.freedesktop.org,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH] drm/i915/display/psr: Print in debugfs if PSR is not enabled because of sink
Date: Thu, 24 Oct 2019 12:21:52 +0530	[thread overview]
Message-ID: <20191024065152.GB24164@intel.com> (raw)
In-Reply-To: <20191023214932.94679-1-jose.souza@intel.com>

On 2019-10-23 at 14:49:32 -0700, José Roberto de Souza wrote:
> Right now if sink reported any PSR error or if it fails to
> acknowledge the PSR wakeup it sets a flag and do not attempt to
> enable PSR anymore. That is the safest approach to avoid repetitive
> glitches and allowed us to have PSR enabled by default.
> 
> But from time to time even good PSR panels have a PSR error, causing
> tests to fail. And for now we are not yet to the point were we could
> try to recover from PSR errors, so lets add this information to the
> debugfs so IGT can check if PSR is disabled because of sink errors or
> not and eliminate this noise from CI runs.
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Ap Kamal <kamal.ap@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index bc0bdf0419e0..07e368ec4fb8 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2194,8 +2194,12 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
>  		status = "disabled";
>  	seq_printf(m, "PSR mode: %s\n", status);
>  
> -	if (!psr->enabled)
> +	if (!psr->enabled) {
> +		seq_printf(m, "PSR sink not reliable: %s\n",
> +			   yesno(psr->sink_not_reliable));
> +
>  		goto unlock;
> +	}
Looks Good to me. As CI will be told where(Source/Destination) the error occured.

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
>  
>  	if (psr->psr2_enabled) {
>  		val = I915_READ(EDP_PSR2_CTL(dev_priv->psr.transcoder));
> -- 
> 2.23.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Ramalingam C <ramalingam.c@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: Ap Kamal <kamal.ap@intel.com>,
	intel-gfx@lists.freedesktop.org,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/display/psr: Print in debugfs if PSR is not enabled because of sink
Date: Thu, 24 Oct 2019 12:21:52 +0530	[thread overview]
Message-ID: <20191024065152.GB24164@intel.com> (raw)
Message-ID: <20191024065152.Pnpxd9Un8tMMgxXswUH3S-2U-HfgJOB6v9U69CEgg8c@z> (raw)
In-Reply-To: <20191023214932.94679-1-jose.souza@intel.com>

On 2019-10-23 at 14:49:32 -0700, José Roberto de Souza wrote:
> Right now if sink reported any PSR error or if it fails to
> acknowledge the PSR wakeup it sets a flag and do not attempt to
> enable PSR anymore. That is the safest approach to avoid repetitive
> glitches and allowed us to have PSR enabled by default.
> 
> But from time to time even good PSR panels have a PSR error, causing
> tests to fail. And for now we are not yet to the point were we could
> try to recover from PSR errors, so lets add this information to the
> debugfs so IGT can check if PSR is disabled because of sink errors or
> not and eliminate this noise from CI runs.
> 
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Ap Kamal <kamal.ap@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index bc0bdf0419e0..07e368ec4fb8 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2194,8 +2194,12 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
>  		status = "disabled";
>  	seq_printf(m, "PSR mode: %s\n", status);
>  
> -	if (!psr->enabled)
> +	if (!psr->enabled) {
> +		seq_printf(m, "PSR sink not reliable: %s\n",
> +			   yesno(psr->sink_not_reliable));
> +
>  		goto unlock;
> +	}
Looks Good to me. As CI will be told where(Source/Destination) the error occured.

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
>  
>  	if (psr->psr2_enabled) {
>  		val = I915_READ(EDP_PSR2_CTL(dev_priv->psr.transcoder));
> -- 
> 2.23.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-10-24  6:51 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-23 21:49 [PATCH] drm/i915/display/psr: Print in debugfs if PSR is not enabled because of sink José Roberto de Souza
2019-10-23 21:49 ` [Intel-gfx] " José Roberto de Souza
2019-10-24  2:53 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-10-24  2:53   ` [Intel-gfx] " Patchwork
2019-10-24  6:51 ` Ramalingam C [this message]
2019-10-24  6:51   ` [Intel-gfx] [PATCH] " Ramalingam C
2019-10-25  0:50 ` ✗ Fi.CI.IGT: failure for " Patchwork
2019-10-25  0:50   ` [Intel-gfx] " Patchwork
2019-10-25  1:01   ` Souza, Jose
2019-10-25  1:01     ` [Intel-gfx] " Souza, Jose

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