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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Sean Paul <sean@poorly.run>
Cc: David Airlie <airlied@linux.ie>,
	intel-gfx@lists.freedesktop.org,
	Sean Paul <seanpaul@chromium.org>,
	dri-devel@lists.freedesktop.org, ramalingm.c@intel.com
Subject: Re: [Intel-gfx] [PATCH 03/11] drm/i915: Disable HDCP signalling on transcoder disable
Date: Thu, 5 Dec 2019 21:33:19 +0200	[thread overview]
Message-ID: <20191205193319.GK1208@intel.com> (raw)
In-Reply-To: <20191203173638.94919-4-sean@poorly.run>

On Tue, Dec 03, 2019 at 12:36:26PM -0500, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
> 
> Currently we rely on intel_hdcp_disable() to disable HDCP signalling in
> the DDI Function Control register. This patch adds a safety net by also
> clearing the bit when we disable the transcoder.
> 
> Once we have HDCP over MST and disappearing connectors, we want to make
> sure that the signalling is truly disabled even if HDCP teardown doesn't
> go as planned.

Why wouldn't it go as planned?

> 
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index b51f244ad7a5..e8ac98a8ee7f 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1952,13 +1952,12 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
>  	i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
>  	u32 val = I915_READ(reg);
>  
> -	if (INTEL_GEN(dev_priv) >= 12) {
> -		val &= ~(TRANS_DDI_FUNC_ENABLE | TGL_TRANS_DDI_PORT_MASK |
> -			 TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
> -	} else {
> -		val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK |
> -			 TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
> -	}
> +	val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_DP_VC_PAYLOAD_ALLOC |
> +		 TRANS_DDI_HDCP_SIGNALLING);
> +	if (INTEL_GEN(dev_priv) >= 12)
> +		val &= ~TGL_TRANS_DDI_PORT_MASK;
> +	else
> +		val &= ~TRANS_DDI_PORT_MASK;
>  	I915_WRITE(reg, val);
>  
>  	if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> -- 
> Sean Paul, Software Engineer, Google / Chromium OS
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Sean Paul <sean@poorly.run>
Cc: David Airlie <airlied@linux.ie>,
	intel-gfx@lists.freedesktop.org,
	Sean Paul <seanpaul@chromium.org>,
	dri-devel@lists.freedesktop.org, ramalingm.c@intel.com
Subject: Re: [Intel-gfx] [PATCH 03/11] drm/i915: Disable HDCP signalling on transcoder disable
Date: Thu, 5 Dec 2019 21:33:19 +0200	[thread overview]
Message-ID: <20191205193319.GK1208@intel.com> (raw)
In-Reply-To: <20191203173638.94919-4-sean@poorly.run>

On Tue, Dec 03, 2019 at 12:36:26PM -0500, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
> 
> Currently we rely on intel_hdcp_disable() to disable HDCP signalling in
> the DDI Function Control register. This patch adds a safety net by also
> clearing the bit when we disable the transcoder.
> 
> Once we have HDCP over MST and disappearing connectors, we want to make
> sure that the signalling is truly disabled even if HDCP teardown doesn't
> go as planned.

Why wouldn't it go as planned?

> 
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index b51f244ad7a5..e8ac98a8ee7f 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1952,13 +1952,12 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
>  	i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
>  	u32 val = I915_READ(reg);
>  
> -	if (INTEL_GEN(dev_priv) >= 12) {
> -		val &= ~(TRANS_DDI_FUNC_ENABLE | TGL_TRANS_DDI_PORT_MASK |
> -			 TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
> -	} else {
> -		val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK |
> -			 TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
> -	}
> +	val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_DP_VC_PAYLOAD_ALLOC |
> +		 TRANS_DDI_HDCP_SIGNALLING);
> +	if (INTEL_GEN(dev_priv) >= 12)
> +		val &= ~TGL_TRANS_DDI_PORT_MASK;
> +	else
> +		val &= ~TRANS_DDI_PORT_MASK;
>  	I915_WRITE(reg, val);
>  
>  	if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> -- 
> Sean Paul, Software Engineer, Google / Chromium OS
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-12-05 19:33 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-03 17:36 [PATCH 00/11] drm/i915: Add support for HDCP 1.4 over MST connectors Sean Paul
2019-12-03 17:36 ` [Intel-gfx] " Sean Paul
2019-12-03 17:36 ` [PATCH 01/11] drm/i915: Fix sha_text population code Sean Paul
2019-12-03 17:36   ` Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-04  1:05   ` Sasha Levin
2019-12-04  1:05     ` [Intel-gfx] " Sasha Levin
2019-12-03 17:36 ` [PATCH 02/11] drm/i915: Intercept Aksv writes in the aux hooks Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-05 19:32   ` Ville Syrjälä
2019-12-05 19:32     ` Ville Syrjälä
2019-12-03 17:36 ` [PATCH 03/11] drm/i915: Disable HDCP signalling on transcoder disable Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-05 19:33   ` Ville Syrjälä [this message]
2019-12-05 19:33     ` Ville Syrjälä
2019-12-06 13:55     ` Sean Paul
2019-12-06 13:55       ` Sean Paul
2019-12-09 15:18       ` Ville Syrjälä
2019-12-09 15:18         ` Ville Syrjälä
2019-12-09 16:13         ` Sean Paul
2019-12-09 16:13           ` Sean Paul
2019-12-10 10:09           ` Daniel Vetter
2019-12-10 10:09             ` Daniel Vetter
2019-12-03 17:36 ` [PATCH 04/11] drm/i915: Don't WARN on HDCP toggle if get_hw_state returns false Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-05 19:39   ` Ville Syrjälä
2019-12-05 19:39     ` [Intel-gfx] " Ville Syrjälä
2019-12-06 13:52     ` Sean Paul
2019-12-06 13:52       ` [Intel-gfx] " Sean Paul
2019-12-09 15:21       ` Ville Syrjälä
2019-12-09 15:21         ` [Intel-gfx] " Ville Syrjälä
2019-12-09 16:16         ` Sean Paul
2019-12-09 16:16           ` [Intel-gfx] " Sean Paul
2019-12-09 17:22           ` Ville Syrjälä
2019-12-09 17:22             ` [Intel-gfx] " Ville Syrjälä
2019-12-03 17:36 ` [PATCH 05/11] drm/i915: Change toggle_signalling() argument to connector Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-05 19:48   ` Ville Syrjälä
2019-12-05 19:48     ` [Intel-gfx] " Ville Syrjälä
2019-12-03 17:36 ` [PATCH 06/11] drm/i915: Factor out hdcp->value assignments Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-03 17:36 ` [PATCH 07/11] drm/i915: Don't fully disable HDCP on a port if multiple pipes are using it Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-03 17:36 ` [PATCH 08/11] drm/i915: Support DP MST in enc_to_dig_port() function Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-03 17:36 ` [PATCH 09/11] drm/i915: Use ddi_update_pipe in intel_dp_mst Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-03 17:36 ` [PATCH 10/11] drm/i915: Expose HDCP shim functions from dp for use by dp_mst Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-03 17:36 ` [PATCH 11/11] drm/i915: Add HDCP 1.4 support for MST connectors Sean Paul
2019-12-03 17:36   ` [Intel-gfx] " Sean Paul
2019-12-03 20:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Add support for HDCP 1.4 over " Patchwork

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