[PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Icenowy Zheng]

Current code tries to store the link rate (in bps, which is a big
number) in a u8, which surely overflow. Then it's converted back to
bandwidth code (which is thus 0) and written to the chip.

The code sometimes works because the chip will automatically fallback to
the lowest possible DP link rate (1.62Gbps) when get the invalid value.
However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps link,
it failed.

As we had already read the link bandwidth as bandwidth code in earlier
code (to check whether it is supported), use it when setting bandwidth,
instead of converting it to link rate and then converting back.

Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
index 56f55c53abfd..2dfa2fd2a23b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
@@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345)
 	if (err)
 		return err;
 
-	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
-	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
+	dpcd[0] = dp_bw;
 	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
 			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
 	if (err)
-- 
2.24.1

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[PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Icenowy Zheng]

Current code tries to store the link rate (in bps, which is a big
number) in a u8, which surely overflow. Then it's converted back to
bandwidth code (which is thus 0) and written to the chip.

The code sometimes works because the chip will automatically fallback to
the lowest possible DP link rate (1.62Gbps) when get the invalid value.
However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps link,
it failed.

As we had already read the link bandwidth as bandwidth code in earlier
code (to check whether it is supported), use it when setting bandwidth,
instead of converting it to link rate and then converting back.

Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
index 56f55c53abfd..2dfa2fd2a23b 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
@@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345)
 	if (err)
 		return err;
 
-	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
-	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
+	dpcd[0] = dp_bw;
 	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
 			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
 	if (err)
-- 
2.24.1

Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Torsten Duwe]

On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
> Current code tries to store the link rate (in bps, which is a big
> number) in a u8, which surely overflow. Then it's converted back to
> bandwidth code (which is thus 0) and written to the chip.
> 
> The code sometimes works because the chip will automatically fallback to
> the lowest possible DP link rate (1.62Gbps) when get the invalid value.
> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps link,
> it failed.
> 
> As we had already read the link bandwidth as bandwidth code in earlier
> code (to check whether it is supported), use it when setting bandwidth,
> instead of converting it to link rate and then converting back.
> 
> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> index 56f55c53abfd..2dfa2fd2a23b 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345)
>  	if (err)
>  		return err;
>  
> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
> +	dpcd[0] = dp_bw;

Why do you make this assignment and not use dp_bw directly in the call?

>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
                                                       ^^^^^^
>  	if (err)
> -- 
> 2.24.1

BTW, my version is only a bit more verbose:

https://patchwork.freedesktop.org/patch/354344/

	Torsten

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Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Torsten Duwe]

On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
> Current code tries to store the link rate (in bps, which is a big
> number) in a u8, which surely overflow. Then it's converted back to
> bandwidth code (which is thus 0) and written to the chip.
> 
> The code sometimes works because the chip will automatically fallback to
> the lowest possible DP link rate (1.62Gbps) when get the invalid value.
> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps link,
> it failed.
> 
> As we had already read the link bandwidth as bandwidth code in earlier
> code (to check whether it is supported), use it when setting bandwidth,
> instead of converting it to link rate and then converting back.
> 
> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> index 56f55c53abfd..2dfa2fd2a23b 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345)
>  	if (err)
>  		return err;
>  
> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
> +	dpcd[0] = dp_bw;

Why do you make this assignment and not use dp_bw directly in the call?

>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
                                                       ^^^^^^
>  	if (err)
> -- 
> 2.24.1

BTW, my version is only a bit more verbose:

https://patchwork.freedesktop.org/patch/354344/

	Torsten

Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Icenowy Zheng]

于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>> Current code tries to store the link rate (in bps, which is a big
>> number) in a u8, which surely overflow. Then it's converted back to
>> bandwidth code (which is thus 0) and written to the chip.
>> 
>> The code sometimes works because the chip will automatically fallback
>to
>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>value.
>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>link,
>> it failed.
>> 
>> As we had already read the link bandwidth as bandwidth code in
>earlier
>> code (to check whether it is supported), use it when setting
>bandwidth,
>> instead of converting it to link rate and then converting back.
>> 
>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> ---
>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> index 56f55c53abfd..2dfa2fd2a23b 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>anx6345 *anx6345)
>>  	if (err)
>>  		return err;
>>  
>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>> +	dpcd[0] = dp_bw;
>
>Why do you make this assignment and not use dp_bw directly in the call?

Because the dpcd array is then written as a continous array
back to DPCD.

>
>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>                                                       ^^^^^^
>>  	if (err)
>> -- 
>> 2.24.1
>
>BTW, my version is only a bit more verbose:
>
>https://patchwork.freedesktop.org/patch/354344/
>
>	Torsten

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Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Icenowy Zheng]

于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>> Current code tries to store the link rate (in bps, which is a big
>> number) in a u8, which surely overflow. Then it's converted back to
>> bandwidth code (which is thus 0) and written to the chip.
>> 
>> The code sometimes works because the chip will automatically fallback
>to
>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>value.
>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>link,
>> it failed.
>> 
>> As we had already read the link bandwidth as bandwidth code in
>earlier
>> code (to check whether it is supported), use it when setting
>bandwidth,
>> instead of converting it to link rate and then converting back.
>> 
>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> ---
>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> index 56f55c53abfd..2dfa2fd2a23b 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>anx6345 *anx6345)
>>  	if (err)
>>  		return err;
>>  
>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>> +	dpcd[0] = dp_bw;
>
>Why do you make this assignment and not use dp_bw directly in the call?

Because the dpcd array is then written as a continous array
back to DPCD.

>
>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>                                                       ^^^^^^
>>  	if (err)
>> -- 
>> 2.24.1
>
>BTW, my version is only a bit more verbose:
>
>https://patchwork.freedesktop.org/patch/354344/
>
>	Torsten

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Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Torsten Duwe]

On Sat, Feb 22, 2020 at 10:43:02AM +0800, Icenowy Zheng wrote:
> 
> 
> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
> >On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
> >> Current code tries to store the link rate (in bps, which is a big
> >> number) in a u8, which surely overflow. Then it's converted back to
> >> bandwidth code (which is thus 0) and written to the chip.
> >> 
> >> The code sometimes works because the chip will automatically fallback
> >to
> >> the lowest possible DP link rate (1.62Gbps) when get the invalid
> >value.
> >> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
> >link,
> >> it failed.
> >> 
> >> As we had already read the link bandwidth as bandwidth code in
> >earlier
> >> code (to check whether it is supported), use it when setting
> >bandwidth,
> >> instead of converting it to link rate and then converting back.
> >> 
> >> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> >> ---
> >>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
> >>  1 file changed, 1 insertion(+), 2 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >> index 56f55c53abfd..2dfa2fd2a23b 100644
> >> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
> >anx6345 *anx6345)
> >>  	if (err)
> >>  		return err;
> >>  
> >> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
> >> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
> >> +	dpcd[0] = dp_bw;
> >
> >Why do you make this assignment and not use dp_bw directly in the call?
> 
> Because the dpcd array is then written as a continous array
> back to DPCD.

But the current code never changes this value?
Anyway, as this might change in the future, I support your version;
I want to see this fixed.

Reviewed-by: Torsten Duwe <duwe@suse.de>
Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Torsten Duwe <duwe@lst.de>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>

> >
> >>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
> >>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
> >                                                       ^^^^^^
> >>  	if (err)
> >> -- 
> >> 2.24.1
> >
> >BTW, my version is only a bit more verbose:
> >
> >https://patchwork.freedesktop.org/patch/354344/
> >
> >	Torsten
> 
> -- 
> 使用 K-9 Mail 发送自我的Android设备。
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Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Torsten Duwe]

On Sat, Feb 22, 2020 at 10:43:02AM +0800, Icenowy Zheng wrote:
> 
> 
> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
> >On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
> >> Current code tries to store the link rate (in bps, which is a big
> >> number) in a u8, which surely overflow. Then it's converted back to
> >> bandwidth code (which is thus 0) and written to the chip.
> >> 
> >> The code sometimes works because the chip will automatically fallback
> >to
> >> the lowest possible DP link rate (1.62Gbps) when get the invalid
> >value.
> >> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
> >link,
> >> it failed.
> >> 
> >> As we had already read the link bandwidth as bandwidth code in
> >earlier
> >> code (to check whether it is supported), use it when setting
> >bandwidth,
> >> instead of converting it to link rate and then converting back.
> >> 
> >> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> >> ---
> >>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
> >>  1 file changed, 1 insertion(+), 2 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >> index 56f55c53abfd..2dfa2fd2a23b 100644
> >> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> >> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
> >anx6345 *anx6345)
> >>  	if (err)
> >>  		return err;
> >>  
> >> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
> >> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
> >> +	dpcd[0] = dp_bw;
> >
> >Why do you make this assignment and not use dp_bw directly in the call?
> 
> Because the dpcd array is then written as a continous array
> back to DPCD.

But the current code never changes this value?
Anyway, as this might change in the future, I support your version;
I want to see this fixed.

Reviewed-by: Torsten Duwe <duwe@suse.de>
Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Torsten Duwe <duwe@lst.de>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>

> >
> >>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
> >>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
> >                                                       ^^^^^^
> >>  	if (err)
> >> -- 
> >> 2.24.1
> >
> >BTW, my version is only a bit more verbose:
> >
> >https://patchwork.freedesktop.org/patch/354344/
> >
> >	Torsten
> 
> -- 
> 使用 K-9 Mail 发送自我的Android设备。

Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Thomas Zimmermann]

Hi Iceynow,

Torsten asked me to merge your patch via drm-misc-next. I'd add the
additional cc and fixes tags that Torsten listed. Are you OK with that?

Best regards
Thomas

Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
> 
> 
> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>> Current code tries to store the link rate (in bps, which is a big
>>> number) in a u8, which surely overflow. Then it's converted back to
>>> bandwidth code (which is thus 0) and written to the chip.
>>>
>>> The code sometimes works because the chip will automatically fallback
>> to
>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>> value.
>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>> link,
>>> it failed.
>>>
>>> As we had already read the link bandwidth as bandwidth code in
>> earlier
>>> code (to check whether it is supported), use it when setting
>> bandwidth,
>>> instead of converting it to link rate and then converting back.
>>>
>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>> ---
>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>> anx6345 *anx6345)
>>>  	if (err)
>>>  		return err;
>>>  
>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>> +	dpcd[0] = dp_bw;
>>
>> Why do you make this assignment and not use dp_bw directly in the call?
> 
> Because the dpcd array is then written as a continous array
> back to DPCD.
> 
>>
>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>                                                       ^^^^^^
>>>  	if (err)
>>> -- 
>>> 2.24.1
>>
>> BTW, my version is only a bit more verbose:
>>
>> https://patchwork.freedesktop.org/patch/354344/
>>
>> 	Torsten
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
_______________________________________________
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Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Thomas Zimmermann]

Hi Iceynow,

Torsten asked me to merge your patch via drm-misc-next. I'd add the
additional cc and fixes tags that Torsten listed. Are you OK with that?

Best regards
Thomas

Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
> 
> 
> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>> Current code tries to store the link rate (in bps, which is a big
>>> number) in a u8, which surely overflow. Then it's converted back to
>>> bandwidth code (which is thus 0) and written to the chip.
>>>
>>> The code sometimes works because the chip will automatically fallback
>> to
>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>> value.
>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>> link,
>>> it failed.
>>>
>>> As we had already read the link bandwidth as bandwidth code in
>> earlier
>>> code (to check whether it is supported), use it when setting
>> bandwidth,
>>> instead of converting it to link rate and then converting back.
>>>
>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>> ---
>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>> anx6345 *anx6345)
>>>  	if (err)
>>>  		return err;
>>>  
>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>> +	dpcd[0] = dp_bw;
>>
>> Why do you make this assignment and not use dp_bw directly in the call?
> 
> Because the dpcd array is then written as a continous array
> back to DPCD.
> 
>>
>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>                                                       ^^^^^^
>>>  	if (err)
>>> -- 
>>> 2.24.1
>>
>> BTW, my version is only a bit more verbose:
>>
>> https://patchwork.freedesktop.org/patch/354344/
>>
>> 	Torsten
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer

Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Icenowy Zheng]

于 2020年2月26日 GMT+08:00 下午6:58:43, Thomas Zimmermann <tzimmermann@suse.de> 写到:
>Hi Iceynow,
>
>Torsten asked me to merge your patch via drm-misc-next. I'd add the
>additional cc and fixes tags that Torsten listed. Are you OK with that?

I think this fixes a driver (and a board) available in 5.6.

Maybe it should enter fixes?

>
>Best regards
>Thomas
>
>Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>> 
>> 
>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>> Current code tries to store the link rate (in bps, which is a big
>>>> number) in a u8, which surely overflow. Then it's converted back to
>>>> bandwidth code (which is thus 0) and written to the chip.
>>>>
>>>> The code sometimes works because the chip will automatically
>fallback
>>> to
>>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>>> value.
>>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>>> link,
>>>> it failed.
>>>>
>>>> As we had already read the link bandwidth as bandwidth code in
>>> earlier
>>>> code (to check whether it is supported), use it when setting
>>> bandwidth,
>>>> instead of converting it to link rate and then converting back.
>>>>
>>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for
>v5.5")
>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>> ---
>>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>>> anx6345 *anx6345)
>>>>  	if (err)
>>>>  		return err;
>>>>  
>>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>>> +	dpcd[0] = dp_bw;
>>>
>>> Why do you make this assignment and not use dp_bw directly in the
>call?
>> 
>> Because the dpcd array is then written as a continous array
>> back to DPCD.
>> 
>>>
>>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>>                                                       ^^^^^^
>>>>  	if (err)
>>>> -- 
>>>> 2.24.1
>>>
>>> BTW, my version is only a bit more verbose:
>>>
>>> https://patchwork.freedesktop.org/patch/354344/
>>>
>>> 	Torsten
>> 

-- 
使用 K-9 Mail 发送自我的Android设备。
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Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Icenowy Zheng]

于 2020年2月26日 GMT+08:00 下午6:58:43, Thomas Zimmermann <tzimmermann@suse.de> 写到:
>Hi Iceynow,
>
>Torsten asked me to merge your patch via drm-misc-next. I'd add the
>additional cc and fixes tags that Torsten listed. Are you OK with that?

I think this fixes a driver (and a board) available in 5.6.

Maybe it should enter fixes?

>
>Best regards
>Thomas
>
>Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>> 
>> 
>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>> Current code tries to store the link rate (in bps, which is a big
>>>> number) in a u8, which surely overflow. Then it's converted back to
>>>> bandwidth code (which is thus 0) and written to the chip.
>>>>
>>>> The code sometimes works because the chip will automatically
>fallback
>>> to
>>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>>> value.
>>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>>> link,
>>>> it failed.
>>>>
>>>> As we had already read the link bandwidth as bandwidth code in
>>> earlier
>>>> code (to check whether it is supported), use it when setting
>>> bandwidth,
>>>> instead of converting it to link rate and then converting back.
>>>>
>>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for
>v5.5")
>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>> ---
>>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>>> anx6345 *anx6345)
>>>>  	if (err)
>>>>  		return err;
>>>>  
>>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>>> +	dpcd[0] = dp_bw;
>>>
>>> Why do you make this assignment and not use dp_bw directly in the
>call?
>> 
>> Because the dpcd array is then written as a continous array
>> back to DPCD.
>> 
>>>
>>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>>                                                       ^^^^^^
>>>>  	if (err)
>>>> -- 
>>>> 2.24.1
>>>
>>> BTW, my version is only a bit more verbose:
>>>
>>> https://patchwork.freedesktop.org/patch/354344/
>>>
>>> 	Torsten
>> 

-- 
使用 K-9 Mail 发送自我的Android设备。

Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Thomas Zimmermann]

Hi

Am 26.02.20 um 12:02 schrieb Icenowy Zheng:
> 
> 
> 于 2020年2月26日 GMT+08:00 下午6:58:43, Thomas Zimmermann <tzimmermann@suse.de> 写到:
>> Hi Iceynow,
>>
>> Torsten asked me to merge your patch via drm-misc-next. I'd add the
>> additional cc and fixes tags that Torsten listed. Are you OK with that?
> 
> I think this fixes a driver (and a board) available in 5.6.
> 
> Maybe it should enter fixes?

I think we can do that. Anything else?

Best regards
Thomas

> 
>>
>> Best regards
>> Thomas
>>
>> Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>>>
>>>
>>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>>> Current code tries to store the link rate (in bps, which is a big
>>>>> number) in a u8, which surely overflow. Then it's converted back to
>>>>> bandwidth code (which is thus 0) and written to the chip.
>>>>>
>>>>> The code sometimes works because the chip will automatically
>> fallback
>>>> to
>>>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>>>> value.
>>>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>>>> link,
>>>>> it failed.
>>>>>
>>>>> As we had already read the link bandwidth as bandwidth code in
>>>> earlier
>>>>> code (to check whether it is supported), use it when setting
>>>> bandwidth,
>>>>> instead of converting it to link rate and then converting back.
>>>>>
>>>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for
>> v5.5")
>>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>>> ---
>>>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>>>> anx6345 *anx6345)
>>>>>  	if (err)
>>>>>  		return err;
>>>>>  
>>>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>>>> +	dpcd[0] = dp_bw;
>>>>
>>>> Why do you make this assignment and not use dp_bw directly in the
>> call?
>>>
>>> Because the dpcd array is then written as a continous array
>>> back to DPCD.
>>>
>>>>
>>>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>>>                                                       ^^^^^^
>>>>>  	if (err)
>>>>> -- 
>>>>> 2.24.1
>>>>
>>>> BTW, my version is only a bit more verbose:
>>>>
>>>> https://patchwork.freedesktop.org/patch/354344/
>>>>
>>>> 	Torsten
>>>
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
_______________________________________________
dri-devel mailing list
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Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Thomas Zimmermann]

Hi

Am 26.02.20 um 12:02 schrieb Icenowy Zheng:
> 
> 
> 于 2020年2月26日 GMT+08:00 下午6:58:43, Thomas Zimmermann <tzimmermann@suse.de> 写到:
>> Hi Iceynow,
>>
>> Torsten asked me to merge your patch via drm-misc-next. I'd add the
>> additional cc and fixes tags that Torsten listed. Are you OK with that?
> 
> I think this fixes a driver (and a board) available in 5.6.
> 
> Maybe it should enter fixes?

I think we can do that. Anything else?

Best regards
Thomas

> 
>>
>> Best regards
>> Thomas
>>
>> Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>>>
>>>
>>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>>> Current code tries to store the link rate (in bps, which is a big
>>>>> number) in a u8, which surely overflow. Then it's converted back to
>>>>> bandwidth code (which is thus 0) and written to the chip.
>>>>>
>>>>> The code sometimes works because the chip will automatically
>> fallback
>>>> to
>>>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>>>> value.
>>>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>>>> link,
>>>>> it failed.
>>>>>
>>>>> As we had already read the link bandwidth as bandwidth code in
>>>> earlier
>>>>> code (to check whether it is supported), use it when setting
>>>> bandwidth,
>>>>> instead of converting it to link rate and then converting back.
>>>>>
>>>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for
>> v5.5")
>>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>>> ---
>>>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>>>> anx6345 *anx6345)
>>>>>  	if (err)
>>>>>  		return err;
>>>>>  
>>>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>>>> +	dpcd[0] = dp_bw;
>>>>
>>>> Why do you make this assignment and not use dp_bw directly in the
>> call?
>>>
>>> Because the dpcd array is then written as a continous array
>>> back to DPCD.
>>>
>>>>
>>>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>>>                                                       ^^^^^^
>>>>>  	if (err)
>>>>> -- 
>>>>> 2.24.1
>>>>
>>>> BTW, my version is only a bit more verbose:
>>>>
>>>> https://patchwork.freedesktop.org/patch/354344/
>>>>
>>>> 	Torsten
>>>
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer

Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Thomas Zimmermann]

Hi

Am 26.02.20 um 12:02 schrieb Icenowy Zheng:
> 
> 
> 于 2020年2月26日 GMT+08:00 下午6:58:43, Thomas Zimmermann <tzimmermann@suse.de> 写到:
>> Hi Iceynow,
>>
>> Torsten asked me to merge your patch via drm-misc-next. I'd add the
>> additional cc and fixes tags that Torsten listed. Are you OK with that?
> 
> I think this fixes a driver (and a board) available in 5.6.
> 
> Maybe it should enter fixes?

Pushed to drm-misc-fixes

Best regards
Thomas

> 
>>
>> Best regards
>> Thomas
>>
>> Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>>>
>>>
>>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>>> Current code tries to store the link rate (in bps, which is a big
>>>>> number) in a u8, which surely overflow. Then it's converted back to
>>>>> bandwidth code (which is thus 0) and written to the chip.
>>>>>
>>>>> The code sometimes works because the chip will automatically
>> fallback
>>>> to
>>>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>>>> value.
>>>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>>>> link,
>>>>> it failed.
>>>>>
>>>>> As we had already read the link bandwidth as bandwidth code in
>>>> earlier
>>>>> code (to check whether it is supported), use it when setting
>>>> bandwidth,
>>>>> instead of converting it to link rate and then converting back.
>>>>>
>>>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for
>> v5.5")
>>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>>> ---
>>>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>>>> anx6345 *anx6345)
>>>>>  	if (err)
>>>>>  		return err;
>>>>>  
>>>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>>>> +	dpcd[0] = dp_bw;
>>>>
>>>> Why do you make this assignment and not use dp_bw directly in the
>> call?
>>>
>>> Because the dpcd array is then written as a continous array
>>> back to DPCD.
>>>
>>>>
>>>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>>>                                                       ^^^^^^
>>>>>  	if (err)
>>>>> -- 
>>>>> 2.24.1
>>>>
>>>> BTW, my version is only a bit more verbose:
>>>>
>>>> https://patchwork.freedesktop.org/patch/354344/
>>>>
>>>> 	Torsten
>>>
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth

[Thomas Zimmermann]

Hi

Am 26.02.20 um 12:02 schrieb Icenowy Zheng:
> 
> 
> 于 2020年2月26日 GMT+08:00 下午6:58:43, Thomas Zimmermann <tzimmermann@suse.de> 写到:
>> Hi Iceynow,
>>
>> Torsten asked me to merge your patch via drm-misc-next. I'd add the
>> additional cc and fixes tags that Torsten listed. Are you OK with that?
> 
> I think this fixes a driver (and a board) available in 5.6.
> 
> Maybe it should enter fixes?

Pushed to drm-misc-fixes

Best regards
Thomas

> 
>>
>> Best regards
>> Thomas
>>
>> Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>>>
>>>
>>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe <duwe@lst.de> 写到:
>>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>>> Current code tries to store the link rate (in bps, which is a big
>>>>> number) in a u8, which surely overflow. Then it's converted back to
>>>>> bandwidth code (which is thus 0) and written to the chip.
>>>>>
>>>>> The code sometimes works because the chip will automatically
>> fallback
>>>> to
>>>>> the lowest possible DP link rate (1.62Gbps) when get the invalid
>>>> value.
>>>>> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps
>>>> link,
>>>>> it failed.
>>>>>
>>>>> As we had already read the link bandwidth as bandwidth code in
>>>> earlier
>>>>> code (to check whether it is supported), use it when setting
>>>> bandwidth,
>>>>> instead of converting it to link rate and then converting back.
>>>>>
>>>>> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for
>> v5.5")
>>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>>>> ---
>>>>>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>>>>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> index 56f55c53abfd..2dfa2fd2a23b 100644
>>>>> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
>>>>> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct
>>>> anx6345 *anx6345)
>>>>>  	if (err)
>>>>>  		return err;
>>>>>  
>>>>> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
>>>>> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
>>>>> +	dpcd[0] = dp_bw;
>>>>
>>>> Why do you make this assignment and not use dp_bw directly in the
>> call?
>>>
>>> Because the dpcd array is then written as a continous array
>>> back to DPCD.
>>>
>>>>
>>>>>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>>>>>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
>>>>                                                       ^^^^^^
>>>>>  	if (err)
>>>>> -- 
>>>>> 2.24.1
>>>>
>>>> BTW, my version is only a bit more verbose:
>>>>
>>>> https://patchwork.freedesktop.org/patch/354344/
>>>>
>>>> 	Torsten
>>>
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer