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From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Jon Hunter <jonathanh@nvidia.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Joseph Lo <josephl@nvidia.com>,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 5/8] memory: tegra: Add EMC scaling support code for Tegra210
Date: Tue, 10 Mar 2020 18:13:38 +0100	[thread overview]
Message-ID: <20200310171338.GF3079591@ulmo> (raw)
In-Reply-To: <4ea3a96f-52cb-4eab-cf92-932f6882ad85@gmail.com>

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On Tue, Mar 10, 2020 at 07:43:12PM +0300, Dmitry Osipenko wrote:
> 10.03.2020 18:20, Thierry Reding пишет:
> > From: Joseph Lo <josephl@nvidia.com>
> > 
> > This is the initial patch for Tegra210 EMC frequency scaling. It has the
> > code to program various aspects of the EMC that are standardized, but it
> > does not yet include the specific programming sequence needed for clock
> > scaling.
> > 
> > The driver is designed to support LPDDR4 SDRAM. Devices that use LPDDR4
> > need to perform training of the RAM before it can be used. Firmware will
> > perform this training during early boot and pass a table of supported
> > frequencies to the kernel via device tree.
> > 
> > For the frequencies above 800 MHz, periodic retraining is needed to
> > compensate for changes in timing. This periodic training will have to be
> > performed until the frequency drops back to or below 800 MHz.
> > 
> > This driver provides helpers used during this runtime retraining that
> > will be used by the sequence specific code in a follow-up patch.
> > 
> > Based on work by Peter De Schrijver <pdeschrijver@nvidia.com>.
> > 
> > Signed-off-by: Joseph Lo <josephl@nvidia.com>
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Changes in v5:
> > - major rework and cleanup
> > 
> >  drivers/memory/tegra/tegra210-emc.c | 1952 +++++++++++++++++++++------
> >  drivers/memory/tegra/tegra210-emc.h |  893 +++++++++++-
> >  2 files changed, 2390 insertions(+), 455 deletions(-)
> > 
> > diff --git a/drivers/memory/tegra/tegra210-emc.c b/drivers/memory/tegra/tegra210-emc.c
> > index 80ea14d1e6ce..4ea8fb70a4fd 100644
> > --- a/drivers/memory/tegra/tegra210-emc.c
> > +++ b/drivers/memory/tegra/tegra210-emc.c
> > @@ -1,6 +1,6 @@
> >  // SPDX-License-Identifier: GPL-2.0
> >  /*
> > - * Copyright (c) 2015-2019, NVIDIA CORPORATION.  All rights reserved.
> > + * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
> >   */
> 
> Would be nice to avoid all the unnecessary changes, like the one above
> and then all the code's removals/reshuffling.
> 
> Such that a new patch was a clean addition to a previous patch, instead
> of a re-write.

I think this is the result of me messing up a rebase. The EMC driver
changes added in the clock driver patch should've been in this patch,
which would've made this a clean addition. I'll reshuffle the code
for the next revision.

Thanks for pointing that out.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	Stephen Boyd <sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v5 5/8] memory: tegra: Add EMC scaling support code for Tegra210
Date: Tue, 10 Mar 2020 18:13:38 +0100	[thread overview]
Message-ID: <20200310171338.GF3079591@ulmo> (raw)
In-Reply-To: <4ea3a96f-52cb-4eab-cf92-932f6882ad85-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

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On Tue, Mar 10, 2020 at 07:43:12PM +0300, Dmitry Osipenko wrote:
> 10.03.2020 18:20, Thierry Reding пишет:
> > From: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > 
> > This is the initial patch for Tegra210 EMC frequency scaling. It has the
> > code to program various aspects of the EMC that are standardized, but it
> > does not yet include the specific programming sequence needed for clock
> > scaling.
> > 
> > The driver is designed to support LPDDR4 SDRAM. Devices that use LPDDR4
> > need to perform training of the RAM before it can be used. Firmware will
> > perform this training during early boot and pass a table of supported
> > frequencies to the kernel via device tree.
> > 
> > For the frequencies above 800 MHz, periodic retraining is needed to
> > compensate for changes in timing. This periodic training will have to be
> > performed until the frequency drops back to or below 800 MHz.
> > 
> > This driver provides helpers used during this runtime retraining that
> > will be used by the sequence specific code in a follow-up patch.
> > 
> > Based on work by Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>.
> > 
> > Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > ---
> > Changes in v5:
> > - major rework and cleanup
> > 
> >  drivers/memory/tegra/tegra210-emc.c | 1952 +++++++++++++++++++++------
> >  drivers/memory/tegra/tegra210-emc.h |  893 +++++++++++-
> >  2 files changed, 2390 insertions(+), 455 deletions(-)
> > 
> > diff --git a/drivers/memory/tegra/tegra210-emc.c b/drivers/memory/tegra/tegra210-emc.c
> > index 80ea14d1e6ce..4ea8fb70a4fd 100644
> > --- a/drivers/memory/tegra/tegra210-emc.c
> > +++ b/drivers/memory/tegra/tegra210-emc.c
> > @@ -1,6 +1,6 @@
> >  // SPDX-License-Identifier: GPL-2.0
> >  /*
> > - * Copyright (c) 2015-2019, NVIDIA CORPORATION.  All rights reserved.
> > + * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
> >   */
> 
> Would be nice to avoid all the unnecessary changes, like the one above
> and then all the code's removals/reshuffling.
> 
> Such that a new patch was a clean addition to a previous patch, instead
> of a re-write.

I think this is the result of me messing up a rebase. The EMC driver
changes added in the clock driver patch should've been in this patch,
which would've made this a clean addition. I'll reshuffle the code
for the next revision.

Thanks for pointing that out.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Jon Hunter <jonathanh@nvidia.com>,
	Rob Herring <robh+dt@kernel.org>, Joseph Lo <josephl@nvidia.com>,
	linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 5/8] memory: tegra: Add EMC scaling support code for Tegra210
Date: Tue, 10 Mar 2020 18:13:38 +0100	[thread overview]
Message-ID: <20200310171338.GF3079591@ulmo> (raw)
In-Reply-To: <4ea3a96f-52cb-4eab-cf92-932f6882ad85@gmail.com>


[-- Attachment #1.1: Type: text/plain, Size: 2495 bytes --]

On Tue, Mar 10, 2020 at 07:43:12PM +0300, Dmitry Osipenko wrote:
> 10.03.2020 18:20, Thierry Reding пишет:
> > From: Joseph Lo <josephl@nvidia.com>
> > 
> > This is the initial patch for Tegra210 EMC frequency scaling. It has the
> > code to program various aspects of the EMC that are standardized, but it
> > does not yet include the specific programming sequence needed for clock
> > scaling.
> > 
> > The driver is designed to support LPDDR4 SDRAM. Devices that use LPDDR4
> > need to perform training of the RAM before it can be used. Firmware will
> > perform this training during early boot and pass a table of supported
> > frequencies to the kernel via device tree.
> > 
> > For the frequencies above 800 MHz, periodic retraining is needed to
> > compensate for changes in timing. This periodic training will have to be
> > performed until the frequency drops back to or below 800 MHz.
> > 
> > This driver provides helpers used during this runtime retraining that
> > will be used by the sequence specific code in a follow-up patch.
> > 
> > Based on work by Peter De Schrijver <pdeschrijver@nvidia.com>.
> > 
> > Signed-off-by: Joseph Lo <josephl@nvidia.com>
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Changes in v5:
> > - major rework and cleanup
> > 
> >  drivers/memory/tegra/tegra210-emc.c | 1952 +++++++++++++++++++++------
> >  drivers/memory/tegra/tegra210-emc.h |  893 +++++++++++-
> >  2 files changed, 2390 insertions(+), 455 deletions(-)
> > 
> > diff --git a/drivers/memory/tegra/tegra210-emc.c b/drivers/memory/tegra/tegra210-emc.c
> > index 80ea14d1e6ce..4ea8fb70a4fd 100644
> > --- a/drivers/memory/tegra/tegra210-emc.c
> > +++ b/drivers/memory/tegra/tegra210-emc.c
> > @@ -1,6 +1,6 @@
> >  // SPDX-License-Identifier: GPL-2.0
> >  /*
> > - * Copyright (c) 2015-2019, NVIDIA CORPORATION.  All rights reserved.
> > + * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
> >   */
> 
> Would be nice to avoid all the unnecessary changes, like the one above
> and then all the code's removals/reshuffling.
> 
> Such that a new patch was a clean addition to a previous patch, instead
> of a re-write.

I think this is the result of me messing up a rebase. The EMC driver
changes added in the clock driver patch should've been in this patch,
which would've made this a clean addition. I'll reshuffle the code
for the next revision.

Thanks for pointing that out.

Thierry

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_______________________________________________
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  reply	other threads:[~2020-03-10 17:13 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-10 15:19 [PATCH v5 0/8] Add EMC scaling support for Tegra210 Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 15:19 ` [PATCH v5 1/8] clk: tegra: Add PLLP_UD and PLLMB_UD " Thierry Reding
2020-03-10 15:19   ` Thierry Reding
2020-03-10 16:19   ` Dmitry Osipenko
2020-03-10 16:19     ` Dmitry Osipenko
2020-03-10 16:19     ` Dmitry Osipenko
2020-03-10 17:05     ` Thierry Reding
2020-03-10 17:05       ` Thierry Reding
2020-03-10 17:05       ` Thierry Reding
2020-03-10 17:50       ` Dmitry Osipenko
2020-03-10 17:50         ` Dmitry Osipenko
2020-03-10 17:50         ` Dmitry Osipenko
2020-03-10 15:19 ` [PATCH v5 2/8] clk: tegra: Export functions for EMC clock scaling Thierry Reding
2020-03-10 15:19   ` Thierry Reding
2020-03-10 15:19   ` Thierry Reding
2020-03-10 16:13   ` Dmitry Osipenko
2020-03-10 16:13     ` Dmitry Osipenko
2020-03-10 16:13     ` Dmitry Osipenko
2020-03-10 16:16     ` Dmitry Osipenko
2020-03-10 16:16       ` Dmitry Osipenko
2020-03-10 16:16       ` Dmitry Osipenko
2020-03-10 17:08       ` Thierry Reding
2020-03-10 17:08         ` Thierry Reding
2020-03-10 17:08         ` Thierry Reding
2020-03-10 17:06     ` Thierry Reding
2020-03-10 17:06       ` Thierry Reding
2020-03-10 15:19 ` [PATCH v5 3/8] clk: tegra: Implement Tegra210 EMC clock Thierry Reding
2020-03-10 15:19   ` Thierry Reding
2020-03-10 15:19   ` Thierry Reding
2020-03-10 16:26   ` Dmitry Osipenko
2020-03-10 16:26     ` Dmitry Osipenko
2020-03-10 16:26     ` Dmitry Osipenko
2020-03-10 17:10     ` Thierry Reding
2020-03-10 17:10       ` Thierry Reding
2020-03-10 16:29   ` Dmitry Osipenko
2020-03-10 16:29     ` Dmitry Osipenko
2020-03-23 11:06     ` Thierry Reding
2020-03-23 11:06       ` Thierry Reding
2020-03-23 11:06       ` Thierry Reding
2020-03-10 16:55   ` Dmitry Osipenko
2020-03-10 16:55     ` Dmitry Osipenko
2020-03-10 16:55     ` Dmitry Osipenko
2020-03-23 11:05     ` Thierry Reding
2020-03-23 11:05       ` Thierry Reding
2020-03-23 11:05       ` Thierry Reding
2020-03-23 13:14       ` Dmitry Osipenko
2020-03-23 13:14         ` Dmitry Osipenko
2020-03-23 13:14         ` Dmitry Osipenko
2020-03-10 17:03   ` Dmitry Osipenko
2020-03-10 17:03     ` Dmitry Osipenko
2020-03-10 17:03     ` Dmitry Osipenko
2020-03-23 11:02     ` Thierry Reding
2020-03-23 11:02       ` Thierry Reding
2020-03-23 11:02       ` Thierry Reding
2020-03-10 17:44   ` Dmitry Osipenko
2020-03-10 17:44     ` Dmitry Osipenko
2020-03-10 17:44     ` Dmitry Osipenko
2020-03-23 11:00     ` Thierry Reding
2020-03-23 11:00       ` Thierry Reding
2020-03-23 11:00       ` Thierry Reding
2020-03-23 13:21       ` Dmitry Osipenko
2020-03-23 13:21         ` Dmitry Osipenko
2020-03-23 13:21         ` Dmitry Osipenko
2020-03-10 15:19 ` [PATCH v5 4/8] dt-bindings: memory: tegra: Add external memory controller binding for Tegra210 Thierry Reding
2020-03-10 15:19   ` Thierry Reding
2020-03-10 15:19   ` Thierry Reding
2020-03-10 16:35   ` Dmitry Osipenko
2020-03-10 16:35     ` Dmitry Osipenko
2020-03-10 16:35     ` Dmitry Osipenko
2020-03-10 17:12     ` Thierry Reding
2020-03-10 17:12       ` Thierry Reding
2020-03-10 17:12       ` Thierry Reding
2020-03-10 18:38   ` Rob Herring
2020-03-10 18:38     ` Rob Herring
2020-03-10 18:38     ` Rob Herring
2020-03-23 10:35   ` Thierry Reding
2020-03-23 10:35     ` Thierry Reding
2020-03-23 10:35     ` Thierry Reding
     [not found] ` <20200310152003.2945170-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-10 15:20   ` [PATCH v5 5/8] memory: tegra: Add EMC scaling support code " Thierry Reding
2020-03-10 15:20     ` Thierry Reding
2020-03-10 16:43     ` Dmitry Osipenko
2020-03-10 16:43       ` Dmitry Osipenko
2020-03-10 16:43       ` Dmitry Osipenko
2020-03-10 17:13       ` Thierry Reding [this message]
2020-03-10 17:13         ` Thierry Reding
2020-03-10 17:13         ` Thierry Reding
2020-03-11  0:25     ` Dmitry Osipenko
2020-03-11  0:25       ` Dmitry Osipenko
2020-03-11  0:25       ` Dmitry Osipenko
2020-03-10 15:20 ` [PATCH v5 6/8] memory: tegra: Add EMC scaling sequence " Thierry Reding
2020-03-10 15:20   ` Thierry Reding
2020-03-10 15:20   ` Thierry Reding
2020-03-10 15:20 ` [PATCH v5 7/8] arm64: tegra: Add external memory controller node " Thierry Reding
2020-03-10 15:20   ` Thierry Reding
2020-03-10 15:20   ` Thierry Reding
2020-03-10 15:20 ` [PATCH v5 8/8] clk: tegra: Remove the old emc_mux clock " Thierry Reding
2020-03-10 15:20   ` Thierry Reding
2020-03-10 15:20   ` Thierry Reding

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