From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Jon Hunter <jonathanh@nvidia.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Joseph Lo <josephl@nvidia.com>,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 3/8] clk: tegra: Implement Tegra210 EMC clock
Date: Mon, 23 Mar 2020 12:00:23 +0100 [thread overview]
Message-ID: <20200323110023.GB3883508@ulmo> (raw)
In-Reply-To: <a5c9e3d6-2b65-ec93-d8f1-7c7680092e53@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2208 bytes --]
On Tue, Mar 10, 2020 at 08:44:38PM +0300, Dmitry Osipenko wrote:
> 10.03.2020 18:19, Thierry Reding пишет:
> > From: Joseph Lo <josephl@nvidia.com>
> >
> > The EMC clock needs to carefully coordinate with the EMC controller
> > programming to make sure external memory can be properly clocked. Do so
> > by hooking up the EMC clock with an EMC provider that will specify which
> > rates are supported by the EMC and provide a callback to use for setting
> > the clock rate at the EMC.
> >
> > Based on work by Peter De Schrijver <pdeschrijver@nvidia.com>.
> >
> > Signed-off-by: Joseph Lo <josephl@nvidia.com>
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Changes in v5:
> > - major rework and cleanup
>
> ...
> > +static u8 tegra210_clk_emc_get_parent(struct clk_hw *hw)
> > +{
> > + struct tegra210_clk_emc *emc = to_tegra210_clk_emc(hw);
> > + u32 value;
> > + u8 src;
> > +
> > + value = readl_relaxed(emc->regs + CLK_SOURCE_EMC);
> > + src = (value >> CLK_SOURCE_EMC_2X_CLK_SRC_SHIFT) &
> > + CLK_SOURCE_EMC_2X_CLK_SRC_MASK;
>
> What about to use a generic FIELD_GET/PREP()?
Done.
> > +static int tegra210_clk_emc_set_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long parent_rate)
> > +{
> > + struct tegra210_clk_emc *emc = to_tegra210_clk_emc(hw);
> > + struct tegra210_clk_emc_provider *provider = emc->provider;
> > + struct tegra210_clk_emc_config *config;
> > + struct device *dev = provider->dev;
> > + struct clk_hw *old, *new, *parent;
> > + u8 old_idx, new_idx, index;
> > + struct clk *clk;
> > + unsigned int i;
> > + int err;
> > +
> > + if (!provider || !provider->configs || provider->num_configs == 0)
> > + return -EINVAL;
>
> Why all these checks are needed? I don't think it ever could fail,
> couldn't it?
This could fail if no EMC provider is attached, which happens, for
example, when the EMC driver is not loaded.
>
> > +static int emc_table_lookup(struct tegra_emc *emc, unsigned long rate)
> > +{
> > + int i;
>
> unsigned int
>
> Same for all other occurrences in the code.
This was fixed automatically after I fixed the rebase issues.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v5 3/8] clk: tegra: Implement Tegra210 EMC clock
Date: Mon, 23 Mar 2020 12:00:23 +0100 [thread overview]
Message-ID: <20200323110023.GB3883508@ulmo> (raw)
In-Reply-To: <a5c9e3d6-2b65-ec93-d8f1-7c7680092e53-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
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On Tue, Mar 10, 2020 at 08:44:38PM +0300, Dmitry Osipenko wrote:
> 10.03.2020 18:19, Thierry Reding пишет:
> > From: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> >
> > The EMC clock needs to carefully coordinate with the EMC controller
> > programming to make sure external memory can be properly clocked. Do so
> > by hooking up the EMC clock with an EMC provider that will specify which
> > rates are supported by the EMC and provide a callback to use for setting
> > the clock rate at the EMC.
> >
> > Based on work by Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>.
> >
> > Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > ---
> > Changes in v5:
> > - major rework and cleanup
>
> ...
> > +static u8 tegra210_clk_emc_get_parent(struct clk_hw *hw)
> > +{
> > + struct tegra210_clk_emc *emc = to_tegra210_clk_emc(hw);
> > + u32 value;
> > + u8 src;
> > +
> > + value = readl_relaxed(emc->regs + CLK_SOURCE_EMC);
> > + src = (value >> CLK_SOURCE_EMC_2X_CLK_SRC_SHIFT) &
> > + CLK_SOURCE_EMC_2X_CLK_SRC_MASK;
>
> What about to use a generic FIELD_GET/PREP()?
Done.
> > +static int tegra210_clk_emc_set_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long parent_rate)
> > +{
> > + struct tegra210_clk_emc *emc = to_tegra210_clk_emc(hw);
> > + struct tegra210_clk_emc_provider *provider = emc->provider;
> > + struct tegra210_clk_emc_config *config;
> > + struct device *dev = provider->dev;
> > + struct clk_hw *old, *new, *parent;
> > + u8 old_idx, new_idx, index;
> > + struct clk *clk;
> > + unsigned int i;
> > + int err;
> > +
> > + if (!provider || !provider->configs || provider->num_configs == 0)
> > + return -EINVAL;
>
> Why all these checks are needed? I don't think it ever could fail,
> couldn't it?
This could fail if no EMC provider is attached, which happens, for
example, when the EMC driver is not loaded.
>
> > +static int emc_table_lookup(struct tegra_emc *emc, unsigned long rate)
> > +{
> > + int i;
>
> unsigned int
>
> Same for all other occurrences in the code.
This was fixed automatically after I fixed the rebase issues.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Jon Hunter <jonathanh@nvidia.com>,
Rob Herring <robh+dt@kernel.org>, Joseph Lo <josephl@nvidia.com>,
linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 3/8] clk: tegra: Implement Tegra210 EMC clock
Date: Mon, 23 Mar 2020 12:00:23 +0100 [thread overview]
Message-ID: <20200323110023.GB3883508@ulmo> (raw)
In-Reply-To: <a5c9e3d6-2b65-ec93-d8f1-7c7680092e53@gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 2208 bytes --]
On Tue, Mar 10, 2020 at 08:44:38PM +0300, Dmitry Osipenko wrote:
> 10.03.2020 18:19, Thierry Reding пишет:
> > From: Joseph Lo <josephl@nvidia.com>
> >
> > The EMC clock needs to carefully coordinate with the EMC controller
> > programming to make sure external memory can be properly clocked. Do so
> > by hooking up the EMC clock with an EMC provider that will specify which
> > rates are supported by the EMC and provide a callback to use for setting
> > the clock rate at the EMC.
> >
> > Based on work by Peter De Schrijver <pdeschrijver@nvidia.com>.
> >
> > Signed-off-by: Joseph Lo <josephl@nvidia.com>
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Changes in v5:
> > - major rework and cleanup
>
> ...
> > +static u8 tegra210_clk_emc_get_parent(struct clk_hw *hw)
> > +{
> > + struct tegra210_clk_emc *emc = to_tegra210_clk_emc(hw);
> > + u32 value;
> > + u8 src;
> > +
> > + value = readl_relaxed(emc->regs + CLK_SOURCE_EMC);
> > + src = (value >> CLK_SOURCE_EMC_2X_CLK_SRC_SHIFT) &
> > + CLK_SOURCE_EMC_2X_CLK_SRC_MASK;
>
> What about to use a generic FIELD_GET/PREP()?
Done.
> > +static int tegra210_clk_emc_set_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long parent_rate)
> > +{
> > + struct tegra210_clk_emc *emc = to_tegra210_clk_emc(hw);
> > + struct tegra210_clk_emc_provider *provider = emc->provider;
> > + struct tegra210_clk_emc_config *config;
> > + struct device *dev = provider->dev;
> > + struct clk_hw *old, *new, *parent;
> > + u8 old_idx, new_idx, index;
> > + struct clk *clk;
> > + unsigned int i;
> > + int err;
> > +
> > + if (!provider || !provider->configs || provider->num_configs == 0)
> > + return -EINVAL;
>
> Why all these checks are needed? I don't think it ever could fail,
> couldn't it?
This could fail if no EMC provider is attached, which happens, for
example, when the EMC driver is not loaded.
>
> > +static int emc_table_lookup(struct tegra_emc *emc, unsigned long rate)
> > +{
> > + int i;
>
> unsigned int
>
> Same for all other occurrences in the code.
This was fixed automatically after I fixed the rebase issues.
Thierry
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next prev parent reply other threads:[~2020-03-23 11:00 UTC|newest]
Thread overview: 100+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-10 15:19 [PATCH v5 0/8] Add EMC scaling support for Tegra210 Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 15:19 ` [PATCH v5 1/8] clk: tegra: Add PLLP_UD and PLLMB_UD " Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 16:19 ` Dmitry Osipenko
2020-03-10 16:19 ` Dmitry Osipenko
2020-03-10 16:19 ` Dmitry Osipenko
2020-03-10 17:05 ` Thierry Reding
2020-03-10 17:05 ` Thierry Reding
2020-03-10 17:05 ` Thierry Reding
2020-03-10 17:50 ` Dmitry Osipenko
2020-03-10 17:50 ` Dmitry Osipenko
2020-03-10 17:50 ` Dmitry Osipenko
2020-03-10 15:19 ` [PATCH v5 2/8] clk: tegra: Export functions for EMC clock scaling Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 16:13 ` Dmitry Osipenko
2020-03-10 16:13 ` Dmitry Osipenko
2020-03-10 16:13 ` Dmitry Osipenko
2020-03-10 16:16 ` Dmitry Osipenko
2020-03-10 16:16 ` Dmitry Osipenko
2020-03-10 16:16 ` Dmitry Osipenko
2020-03-10 17:08 ` Thierry Reding
2020-03-10 17:08 ` Thierry Reding
2020-03-10 17:08 ` Thierry Reding
2020-03-10 17:06 ` Thierry Reding
2020-03-10 17:06 ` Thierry Reding
2020-03-10 15:19 ` [PATCH v5 3/8] clk: tegra: Implement Tegra210 EMC clock Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 16:26 ` Dmitry Osipenko
2020-03-10 16:26 ` Dmitry Osipenko
2020-03-10 16:26 ` Dmitry Osipenko
2020-03-10 17:10 ` Thierry Reding
2020-03-10 17:10 ` Thierry Reding
2020-03-10 16:29 ` Dmitry Osipenko
2020-03-10 16:29 ` Dmitry Osipenko
2020-03-23 11:06 ` Thierry Reding
2020-03-23 11:06 ` Thierry Reding
2020-03-23 11:06 ` Thierry Reding
2020-03-10 16:55 ` Dmitry Osipenko
2020-03-10 16:55 ` Dmitry Osipenko
2020-03-10 16:55 ` Dmitry Osipenko
2020-03-23 11:05 ` Thierry Reding
2020-03-23 11:05 ` Thierry Reding
2020-03-23 11:05 ` Thierry Reding
2020-03-23 13:14 ` Dmitry Osipenko
2020-03-23 13:14 ` Dmitry Osipenko
2020-03-23 13:14 ` Dmitry Osipenko
2020-03-10 17:03 ` Dmitry Osipenko
2020-03-10 17:03 ` Dmitry Osipenko
2020-03-10 17:03 ` Dmitry Osipenko
2020-03-23 11:02 ` Thierry Reding
2020-03-23 11:02 ` Thierry Reding
2020-03-23 11:02 ` Thierry Reding
2020-03-10 17:44 ` Dmitry Osipenko
2020-03-10 17:44 ` Dmitry Osipenko
2020-03-10 17:44 ` Dmitry Osipenko
2020-03-23 11:00 ` Thierry Reding [this message]
2020-03-23 11:00 ` Thierry Reding
2020-03-23 11:00 ` Thierry Reding
2020-03-23 13:21 ` Dmitry Osipenko
2020-03-23 13:21 ` Dmitry Osipenko
2020-03-23 13:21 ` Dmitry Osipenko
2020-03-10 15:19 ` [PATCH v5 4/8] dt-bindings: memory: tegra: Add external memory controller binding for Tegra210 Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 15:19 ` Thierry Reding
2020-03-10 16:35 ` Dmitry Osipenko
2020-03-10 16:35 ` Dmitry Osipenko
2020-03-10 16:35 ` Dmitry Osipenko
2020-03-10 17:12 ` Thierry Reding
2020-03-10 17:12 ` Thierry Reding
2020-03-10 17:12 ` Thierry Reding
2020-03-10 18:38 ` Rob Herring
2020-03-10 18:38 ` Rob Herring
2020-03-10 18:38 ` Rob Herring
2020-03-23 10:35 ` Thierry Reding
2020-03-23 10:35 ` Thierry Reding
2020-03-23 10:35 ` Thierry Reding
[not found] ` <20200310152003.2945170-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-10 15:20 ` [PATCH v5 5/8] memory: tegra: Add EMC scaling support code " Thierry Reding
2020-03-10 15:20 ` Thierry Reding
2020-03-10 16:43 ` Dmitry Osipenko
2020-03-10 16:43 ` Dmitry Osipenko
2020-03-10 16:43 ` Dmitry Osipenko
2020-03-10 17:13 ` Thierry Reding
2020-03-10 17:13 ` Thierry Reding
2020-03-10 17:13 ` Thierry Reding
2020-03-11 0:25 ` Dmitry Osipenko
2020-03-11 0:25 ` Dmitry Osipenko
2020-03-11 0:25 ` Dmitry Osipenko
2020-03-10 15:20 ` [PATCH v5 6/8] memory: tegra: Add EMC scaling sequence " Thierry Reding
2020-03-10 15:20 ` Thierry Reding
2020-03-10 15:20 ` Thierry Reding
2020-03-10 15:20 ` [PATCH v5 7/8] arm64: tegra: Add external memory controller node " Thierry Reding
2020-03-10 15:20 ` Thierry Reding
2020-03-10 15:20 ` Thierry Reding
2020-03-10 15:20 ` [PATCH v5 8/8] clk: tegra: Remove the old emc_mux clock " Thierry Reding
2020-03-10 15:20 ` Thierry Reding
2020-03-10 15:20 ` Thierry Reding
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