From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 3/7] arm64: tegra: Order nodes by unit-address on Tegra194
Date: Fri, 20 Mar 2020 14:34:48 +0100 [thread overview]
Message-ID: <20200320133452.3705040-4-thierry.reding@gmail.com> (raw)
In-Reply-To: <20200320133452.3705040-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The pin controller device tree node was accidentally added in the wrong
place. Move it to the correct location to keep nodes ordered by unit-
address.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 64 ++++++++++++------------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index f4ede86e32b4..019f66f03a97 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -45,6 +45,38 @@ gpio: gpio@2200000 {
gpio-controller;
};
+ pinmux: pinmux@2430000 {
+ compatible = "nvidia,tegra194-pinmux";
+ reg = <0x2430000 0x17000
+ 0xc300000 0x4000>;
+
+ status = "okay";
+
+ pex_rst_c5_out_state: pex_rst_c5_out {
+ pex_rst {
+ nvidia,pins = "pex_l5_rst_n_pgg1";
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,lpdr = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ };
+ };
+
+ clkreq_c5_bi_dir_state: clkreq_c5_bi_dir {
+ clkreq {
+ nvidia,pins = "pex_l5_clkreq_n_pgg0";
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,lpdr = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ };
+ };
+ };
+
ethernet@2490000 {
compatible = "nvidia,tegra194-eqos",
"nvidia,tegra186-eqos",
@@ -139,38 +171,6 @@ agic: interrupt-controller@2a40000 {
};
};
- pinmux: pinmux@2430000 {
- compatible = "nvidia,tegra194-pinmux";
- reg = <0x2430000 0x17000
- 0xc300000 0x4000>;
-
- status = "okay";
-
- pex_rst_c5_out_state: pex_rst_c5_out {
- pex_rst {
- nvidia,pins = "pex_l5_rst_n_pgg1";
- nvidia,schmitt = <TEGRA_PIN_DISABLE>;
- nvidia,lpdr = <TEGRA_PIN_ENABLE>;
- nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- };
- };
-
- clkreq_c5_bi_dir_state: clkreq_c5_bi_dir {
- clkreq {
- nvidia,pins = "pex_l5_clkreq_n_pgg0";
- nvidia,schmitt = <TEGRA_PIN_DISABLE>;
- nvidia,lpdr = <TEGRA_PIN_ENABLE>;
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- };
- };
- };
-
mc: memory-controller@2c00000 {
compatible = "nvidia,tegra194-mc";
reg = <0x02c00000 0x100000>,
--
2.24.1
WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Thierry Reding <thierry.reding@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Jon Hunter <jonathanh@nvidia.com>,
linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 3/7] arm64: tegra: Order nodes by unit-address on Tegra194
Date: Fri, 20 Mar 2020 14:34:48 +0100 [thread overview]
Message-ID: <20200320133452.3705040-4-thierry.reding@gmail.com> (raw)
In-Reply-To: <20200320133452.3705040-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
The pin controller device tree node was accidentally added in the wrong
place. Move it to the correct location to keep nodes ordered by unit-
address.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 64 ++++++++++++------------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index f4ede86e32b4..019f66f03a97 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -45,6 +45,38 @@ gpio: gpio@2200000 {
gpio-controller;
};
+ pinmux: pinmux@2430000 {
+ compatible = "nvidia,tegra194-pinmux";
+ reg = <0x2430000 0x17000
+ 0xc300000 0x4000>;
+
+ status = "okay";
+
+ pex_rst_c5_out_state: pex_rst_c5_out {
+ pex_rst {
+ nvidia,pins = "pex_l5_rst_n_pgg1";
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,lpdr = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ };
+ };
+
+ clkreq_c5_bi_dir_state: clkreq_c5_bi_dir {
+ clkreq {
+ nvidia,pins = "pex_l5_clkreq_n_pgg0";
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,lpdr = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ };
+ };
+ };
+
ethernet@2490000 {
compatible = "nvidia,tegra194-eqos",
"nvidia,tegra186-eqos",
@@ -139,38 +171,6 @@ agic: interrupt-controller@2a40000 {
};
};
- pinmux: pinmux@2430000 {
- compatible = "nvidia,tegra194-pinmux";
- reg = <0x2430000 0x17000
- 0xc300000 0x4000>;
-
- status = "okay";
-
- pex_rst_c5_out_state: pex_rst_c5_out {
- pex_rst {
- nvidia,pins = "pex_l5_rst_n_pgg1";
- nvidia,schmitt = <TEGRA_PIN_DISABLE>;
- nvidia,lpdr = <TEGRA_PIN_ENABLE>;
- nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- };
- };
-
- clkreq_c5_bi_dir_state: clkreq_c5_bi_dir {
- clkreq {
- nvidia,pins = "pex_l5_clkreq_n_pgg0";
- nvidia,schmitt = <TEGRA_PIN_DISABLE>;
- nvidia,lpdr = <TEGRA_PIN_ENABLE>;
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- };
- };
- };
-
mc: memory-controller@2c00000 {
compatible = "nvidia,tegra194-mc";
reg = <0x02c00000 0x100000>,
--
2.24.1
next prev parent reply other threads:[~2020-03-20 13:34 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-20 13:34 [PATCH 0/7] clocksource: Add NVIDIA Tegra186 timers support Thierry Reding
2020-03-20 13:34 ` Thierry Reding
[not found] ` <20200320133452.3705040-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-20 13:34 ` [PATCH 1/7] dt-bindings: timer: Add bindings for NVIDIA Tegra186 timers Thierry Reding
2020-03-20 13:34 ` Thierry Reding
[not found] ` <20200320133452.3705040-2-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-30 23:28 ` Rob Herring
2020-03-30 23:28 ` Rob Herring
2020-03-20 13:34 ` [PATCH 2/7] clocksource: Add Tegra186 timers support Thierry Reding
2020-03-20 13:34 ` Thierry Reding
[not found] ` <20200320133452.3705040-3-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-20 14:39 ` Dmitry Osipenko
2020-03-20 14:39 ` Dmitry Osipenko
2020-03-20 15:04 ` Thierry Reding
2020-03-20 15:23 ` Dmitry Osipenko
2020-03-20 15:23 ` Dmitry Osipenko
2020-03-23 13:38 ` Thierry Reding
[not found] ` <5a559950-0497-b24f-6484-c2513375fe62-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-31 20:04 ` Thierry Reding
2020-03-31 20:04 ` Thierry Reding
2020-03-20 15:11 ` Dmitry Osipenko
2020-03-20 15:11 ` Dmitry Osipenko
[not found] ` <48b2099c-dd83-d4dc-aab4-8c6f68a215cf-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-20 15:38 ` Dmitry Osipenko
2020-03-20 15:38 ` Dmitry Osipenko
[not found] ` <da2a0501-664a-c5d0-7b13-174e5347eaf7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-23 13:42 ` Thierry Reding
2020-03-23 13:42 ` Thierry Reding
2020-03-23 13:45 ` Dmitry Osipenko
2020-03-23 16:10 ` Dmitry Osipenko
[not found] ` <b3859b98-02a3-d197-735c-2c9a9fbe597c-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-31 19:58 ` Thierry Reding
2020-03-31 19:58 ` Thierry Reding
2020-03-20 13:34 ` Thierry Reding [this message]
2020-03-20 13:34 ` [PATCH 3/7] arm64: tegra: Order nodes by unit-address on Tegra194 Thierry Reding
2020-03-20 13:34 ` [PATCH 4/7] arm64: tegra: Add native timer support on Tegra186 Thierry Reding
2020-03-20 13:34 ` Thierry Reding
2020-03-20 13:34 ` [PATCH 6/7] arm64: tegra: Add native timer support on Tegra194 Thierry Reding
2020-03-20 13:34 ` Thierry Reding
2020-03-20 13:34 ` [PATCH 7/7] arm64: tegra: Enable native timers on Jetson AGX Xavier Thierry Reding
2020-03-20 13:34 ` Thierry Reding
2020-03-20 13:34 ` [PATCH 5/7] arm64: tegra: Enable native timers on Jetson TX2 Thierry Reding
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