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From: Catalin Marinas <catalin.marinas@arm.com>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	kernel-hardening@lists.openwall.com, will@kernel.org,
	mark.rutland@arm.com
Subject: Re: [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature
Date: Thu, 2 Apr 2020 12:15:02 +0100	[thread overview]
Message-ID: <20200402111502.GC21087@mbp> (raw)
In-Reply-To: <20200329141258.31172-1-ardb@kernel.org>

On Sun, Mar 29, 2020 at 04:12:58PM +0200, Ard Biesheuvel wrote:
> When CONFIG_DEBUG_ALIGN_RODATA is enabled, kernel segments mapped with
> different permissions (r-x for .text, r-- for .rodata, rw- for .data,
> etc) are rounded up to 2 MiB so they can be mapped more efficiently.
> In particular, it permits the segments to be mapped using level 2
> block entries when using 4k pages, which is expected to result in less
> TLB pressure.
> 
> However, the mappings for the bulk of the kernel will use level 2
> entries anyway, and the misaligned fringes are organized such that they
> can take advantage of the contiguous bit, and use far fewer level 3
> entries than would be needed otherwise.
> 
> This makes the value of this feature dubious at best, and since it is not
> enabled in defconfig or in the distro configs, it does not appear to be
> in wide use either. So let's just remove it.
> 
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

Happy to take this patch via the arm64 tree for 5.7 (no new
functionality), unless you want it to go with your other relocation
login in the EFI stub patches.

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: mark.rutland@arm.com, will@kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kernel-hardening@lists.openwall.com
Subject: Re: [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature
Date: Thu, 2 Apr 2020 12:15:02 +0100	[thread overview]
Message-ID: <20200402111502.GC21087@mbp> (raw)
In-Reply-To: <20200329141258.31172-1-ardb@kernel.org>

On Sun, Mar 29, 2020 at 04:12:58PM +0200, Ard Biesheuvel wrote:
> When CONFIG_DEBUG_ALIGN_RODATA is enabled, kernel segments mapped with
> different permissions (r-x for .text, r-- for .rodata, rw- for .data,
> etc) are rounded up to 2 MiB so they can be mapped more efficiently.
> In particular, it permits the segments to be mapped using level 2
> block entries when using 4k pages, which is expected to result in less
> TLB pressure.
> 
> However, the mappings for the bulk of the kernel will use level 2
> entries anyway, and the misaligned fringes are organized such that they
> can take advantage of the contiguous bit, and use far fewer level 3
> entries than would be needed otherwise.
> 
> This makes the value of this feature dubious at best, and since it is not
> enabled in defconfig or in the distro configs, it does not appear to be
> in wide use either. So let's just remove it.
> 
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

Happy to take this patch via the arm64 tree for 5.7 (no new
functionality), unless you want it to go with your other relocation
login in the EFI stub patches.

-- 
Catalin

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  parent reply	other threads:[~2020-04-02 12:33 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-29 14:12 [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature Ard Biesheuvel
2020-03-29 14:12 ` Ard Biesheuvel
2020-03-30 11:29 ` Mark Rutland
2020-03-30 11:29   ` Mark Rutland
2020-03-30 12:36   ` Ard Biesheuvel
2020-03-30 12:36     ` Ard Biesheuvel
2020-03-30 13:51 ` Will Deacon
2020-03-30 13:51   ` Will Deacon
2020-03-30 13:53   ` Ard Biesheuvel
2020-03-30 13:53     ` Ard Biesheuvel
2020-03-30 13:59     ` Robin Murphy
2020-03-30 13:59       ` Robin Murphy
2020-03-30 14:04     ` Will Deacon
2020-03-30 14:04       ` Will Deacon
2020-03-30 14:22       ` Ard Biesheuvel
2020-03-30 14:22         ` Ard Biesheuvel
2020-03-30 14:28         ` Will Deacon
2020-03-30 14:28           ` Will Deacon
2020-03-30 14:32           ` Ard Biesheuvel
2020-03-30 14:32             ` Ard Biesheuvel
2020-04-02 11:30             ` Catalin Marinas
2020-04-02 11:30               ` Catalin Marinas
2020-04-02 12:17               ` Mark Rutland
2020-04-02 12:17                 ` Mark Rutland
2020-04-03  7:07               ` Will Deacon
2020-04-03  7:07                 ` Will Deacon
2020-04-03  8:58               ` Ard Biesheuvel
2020-04-03  8:58                 ` Ard Biesheuvel
2020-05-05 10:44                 ` Will Deacon
2020-05-05 10:44                   ` Will Deacon
2020-05-07 13:43                   ` Catalin Marinas
2020-05-07 13:43                     ` Catalin Marinas
2020-03-30 13:57 ` Laura Abbott
2020-03-30 13:57   ` Laura Abbott
2020-04-02 11:15 ` Catalin Marinas [this message]
2020-04-02 11:15   ` Catalin Marinas
2020-04-02 11:24   ` Ard Biesheuvel
2020-04-02 11:24     ` Ard Biesheuvel

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