From: Dan Carpenter <dan.carpenter@oracle.com>
To: Bjorn Helgaas <helgaas@kernel.org>, kbuild@lists.01.org
Cc: Shiju Jose <shiju.jose@huawei.com>,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, rjw@rjwysocki.net, lenb@kernel.org,
bp@alien8.de, james.morse@arm.com, tony.luck@intel.com,
gregkh@linuxfoundation.org, zhangliguang@linux.alibaba.com,
tglx@linutronix.de, linuxarm@huawei.com,
jonathan.cameron@huawei.com, tanxiaofei@huawei.com,
yangyicong@hisilicon.com
Subject: Re: [PATCH v5 2/2] PCI: HIP: Add handling of HiSilicon HIP PCIe controller errors
Date: Fri, 3 Apr 2020 13:23:13 +0300 [thread overview]
Message-ID: <20200403102313.GD2066@kadam> (raw)
In-Reply-To: <20200325173639.GA484@google.com>
I've added the kbuild list because I think you have a point.
On Wed, Mar 25, 2020 at 12:36:39PM -0500, Bjorn Helgaas wrote:
> [+cc Dan]
>
Shiju had already added me to the CC list...
> On Wed, Mar 25, 2020 at 01:55:18PM +0000, Shiju Jose wrote:
> > The HiSilicon HIP PCIe controller is capable of handling errors
> > on root port and perform port reset separately at each root port.
> >
> > This patch add error handling driver for HIP PCIe controller to log
> > and report recoverable errors. Perform root port reset and restore
> > link status after the recovery.
> >
> > Following are some of the PCIe controller's recoverable errors
> > 1. completion transmission timeout error.
> > 2. CRS retry counter over the threshold error.
> > 3. ECC 2 bit errors
> > 4. AXI bresponse/rresponse errors etc.
> >
> > Also fix the following Smatch warning:
> > warn: should '((((1))) << (9 + i))' be a 64 bit type?
> > if (err->val_bits & BIT(HISI_PCIE_LOCAL_VALID_ERR_MISC + i))
> > ^^^ This should be BIT_ULL() because it goes up to 9 + 32.
> > Reported-by: kbuild test robot <lkp@intel.com>
> > Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> I'm glad you did this fix, and thanks for acknowledging Dan, but I
> don't think it's necessary to mention it in the commit log here
> because it won't really be useful in the future. It's only relevant
> when comparing the unmerged versions of this series, e.g., v4 compared
> to v3.
It's the kbuild template which suggests adding the Reported-by tags but
you're right that it's not really appropriate for patches that haven't
been merged yet. I wish there were a correct tag. I just saw yesterday
where a maintainer insisted that someone add a Suggested-by tag and I
don't think that's appropriate either.
regards,
dan carpenter
WARNING: multiple messages have this Message-ID (diff)
From: Dan Carpenter <dan.carpenter@oracle.com>
To: kbuild@lists.01.org
Subject: Re: [PATCH v5 2/2] PCI: HIP: Add handling of HiSilicon HIP PCIe controller errors
Date: Fri, 03 Apr 2020 13:23:13 +0300 [thread overview]
Message-ID: <20200403102313.GD2066@kadam> (raw)
In-Reply-To: <20200325173639.GA484@google.com>
[-- Attachment #1: Type: text/plain, Size: 1839 bytes --]
I've added the kbuild list because I think you have a point.
On Wed, Mar 25, 2020 at 12:36:39PM -0500, Bjorn Helgaas wrote:
> [+cc Dan]
>
Shiju had already added me to the CC list...
> On Wed, Mar 25, 2020 at 01:55:18PM +0000, Shiju Jose wrote:
> > The HiSilicon HIP PCIe controller is capable of handling errors
> > on root port and perform port reset separately at each root port.
> >
> > This patch add error handling driver for HIP PCIe controller to log
> > and report recoverable errors. Perform root port reset and restore
> > link status after the recovery.
> >
> > Following are some of the PCIe controller's recoverable errors
> > 1. completion transmission timeout error.
> > 2. CRS retry counter over the threshold error.
> > 3. ECC 2 bit errors
> > 4. AXI bresponse/rresponse errors etc.
> >
> > Also fix the following Smatch warning:
> > warn: should '((((1))) << (9 + i))' be a 64 bit type?
> > if (err->val_bits & BIT(HISI_PCIE_LOCAL_VALID_ERR_MISC + i))
> > ^^^ This should be BIT_ULL() because it goes up to 9 + 32.
> > Reported-by: kbuild test robot <lkp@intel.com>
> > Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> I'm glad you did this fix, and thanks for acknowledging Dan, but I
> don't think it's necessary to mention it in the commit log here
> because it won't really be useful in the future. It's only relevant
> when comparing the unmerged versions of this series, e.g., v4 compared
> to v3.
It's the kbuild template which suggests adding the Reported-by tags but
you're right that it's not really appropriate for patches that haven't
been merged yet. I wish there were a correct tag. I just saw yesterday
where a maintainer insisted that someone add a Suggested-by tag and I
don't think that's appropriate either.
regards,
dan carpenter
next prev parent reply other threads:[~2020-04-03 10:24 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-25 13:55 [PATCH v5 2/2] PCI: HIP: Add handling of HiSilicon HIP PCIe controller errors Shiju Jose
2020-03-25 17:36 ` Bjorn Helgaas
2020-03-26 9:47 ` Shiju Jose
2020-04-03 10:23 ` Dan Carpenter [this message]
2020-04-03 10:23 ` Dan Carpenter
2020-04-03 13:33 ` Bjorn Helgaas
2020-04-03 14:41 ` Dan Carpenter
2020-04-03 14:41 ` Dan Carpenter
-- strict thread matches above, loose matches on Subject: below --
2020-03-25 14:11 Shiju Jose
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