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From: Lecopzer Chen <lecopzer@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: mark.rutland@arm.com, lecopzer.chen@mediatek.com,
	Lecopzer Chen <lecopzer@gmail.com>,
	alexander.shishkin@linux.intel.com, catalin.marinas@arm.com,
	jolsa@redhat.com, acme@kernel.org, peterz@infradead.org,
	mingo@redhat.com, linux-mediatek@lists.infradead.org,
	matthias.bgg@gmail.com, namhyung@kernel.org, will@kernel.org,
	yj.chiang@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts
Date: Sat, 16 May 2020 20:48:54 +0800	[thread overview]
Message-ID: <20200516124857.75004-1-lecopzer@gmail.com> (raw)

These series implement Perf NMI funxtionality and depends on
Pseudo NMI [1] which has been upstreamed.

In arm64 with GICv3, Pseudo NMI was implemented for NMI-like interruts.
That can be extended to Perf NMI which is the prerequisite for hard-lockup
detector which had already a standard interface inside Linux.

Thus the first step we need to implement perf NMI interface and make sure
it works fine.

Perf NMI has been test by dd if=/dev/urandom of=/dev/null like the link [2]
did.

[1] https://lkml.org/lkml/2019/1/31/535
[2] https://www.linaro.org/blog/debugging-arm-kernels-using-nmifiq


Lecopzer Chen (3):
  arm_pmu: Add support for perf NMI interrupts registration
  arm64: perf: Support NMI context for perf event ISR
  arm64: Kconfig: Add support for the Perf NMI

 arch/arm64/Kconfig             | 10 +++++++
 arch/arm64/kernel/perf_event.c | 36 ++++++++++++++++++------
 drivers/perf/arm_pmu.c         | 51 ++++++++++++++++++++++++++++++----
 include/linux/perf/arm_pmu.h   |  6 ++++
 4 files changed, 88 insertions(+), 15 deletions(-)

-- 
2.25.1


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Lecopzer Chen <lecopzer@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: mark.rutland@arm.com, lecopzer.chen@mediatek.com,
	Lecopzer Chen <lecopzer@gmail.com>,
	alexander.shishkin@linux.intel.com, catalin.marinas@arm.com,
	jolsa@redhat.com, acme@kernel.org, peterz@infradead.org,
	mingo@redhat.com, linux-mediatek@lists.infradead.org,
	matthias.bgg@gmail.com, namhyung@kernel.org, will@kernel.org,
	yj.chiang@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts
Date: Sat, 16 May 2020 20:48:54 +0800	[thread overview]
Message-ID: <20200516124857.75004-1-lecopzer@gmail.com> (raw)

These series implement Perf NMI funxtionality and depends on
Pseudo NMI [1] which has been upstreamed.

In arm64 with GICv3, Pseudo NMI was implemented for NMI-like interruts.
That can be extended to Perf NMI which is the prerequisite for hard-lockup
detector which had already a standard interface inside Linux.

Thus the first step we need to implement perf NMI interface and make sure
it works fine.

Perf NMI has been test by dd if=/dev/urandom of=/dev/null like the link [2]
did.

[1] https://lkml.org/lkml/2019/1/31/535
[2] https://www.linaro.org/blog/debugging-arm-kernels-using-nmifiq


Lecopzer Chen (3):
  arm_pmu: Add support for perf NMI interrupts registration
  arm64: perf: Support NMI context for perf event ISR
  arm64: Kconfig: Add support for the Perf NMI

 arch/arm64/Kconfig             | 10 +++++++
 arch/arm64/kernel/perf_event.c | 36 ++++++++++++++++++------
 drivers/perf/arm_pmu.c         | 51 ++++++++++++++++++++++++++++++----
 include/linux/perf/arm_pmu.h   |  6 ++++
 4 files changed, 88 insertions(+), 15 deletions(-)

-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Lecopzer Chen <lecopzer@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: lecopzer.chen@mediatek.com, linux-arm-kernel@lists.infradead.org,
	matthias.bgg@gmail.com, catalin.marinas@arm.com, will@kernel.org,
	mark.rutland@arm.com, mingo@redhat.com, acme@kernel.org,
	jolsa@redhat.com, namhyung@kernel.org,
	linux-mediatek@lists.infradead.org,
	alexander.shishkin@linux.intel.com, peterz@infradead.org,
	yj.chiang@mediatek.com, Lecopzer Chen <lecopzer@gmail.com>
Subject: [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts
Date: Sat, 16 May 2020 20:48:54 +0800	[thread overview]
Message-ID: <20200516124857.75004-1-lecopzer@gmail.com> (raw)

These series implement Perf NMI funxtionality and depends on
Pseudo NMI [1] which has been upstreamed.

In arm64 with GICv3, Pseudo NMI was implemented for NMI-like interruts.
That can be extended to Perf NMI which is the prerequisite for hard-lockup
detector which had already a standard interface inside Linux.

Thus the first step we need to implement perf NMI interface and make sure
it works fine.

Perf NMI has been test by dd if=/dev/urandom of=/dev/null like the link [2]
did.

[1] https://lkml.org/lkml/2019/1/31/535
[2] https://www.linaro.org/blog/debugging-arm-kernels-using-nmifiq


Lecopzer Chen (3):
  arm_pmu: Add support for perf NMI interrupts registration
  arm64: perf: Support NMI context for perf event ISR
  arm64: Kconfig: Add support for the Perf NMI

 arch/arm64/Kconfig             | 10 +++++++
 arch/arm64/kernel/perf_event.c | 36 ++++++++++++++++++------
 drivers/perf/arm_pmu.c         | 51 ++++++++++++++++++++++++++++++----
 include/linux/perf/arm_pmu.h   |  6 ++++
 4 files changed, 88 insertions(+), 15 deletions(-)

-- 
2.25.1


             reply	other threads:[~2020-05-16 12:50 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-16 12:48 Lecopzer Chen [this message]
2020-05-16 12:48 ` [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts Lecopzer Chen
2020-05-16 12:48 ` Lecopzer Chen
2020-05-16 12:48 ` [PATCH 1/3] arm_pmu: Add support for perf NMI interrupts registration Lecopzer Chen
2020-05-16 12:48   ` Lecopzer Chen
2020-05-16 12:48   ` Lecopzer Chen
2020-05-17  6:39   ` Lecopzer Chen
2020-05-17  6:39     ` Lecopzer Chen
2020-05-17  6:39     ` Lecopzer Chen
2020-05-16 12:48 ` [PATCH 2/3] arm64: perf: Support NMI context for perf event ISR Lecopzer Chen
2020-05-16 12:48   ` Lecopzer Chen
2020-05-16 12:48   ` Lecopzer Chen
2020-05-16 12:48 ` [PATCH 3/3] arm64: Kconfig: Add support for the Perf NMI Lecopzer Chen
2020-05-16 12:48   ` Lecopzer Chen
2020-05-16 12:48   ` Lecopzer Chen
2020-05-18  5:46 ` [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts Sumit Garg
2020-05-18  5:46   ` Sumit Garg
2020-05-18  5:46   ` Sumit Garg
2020-05-18  6:26   ` Lecopzer Chen
2020-05-18  6:26     ` Lecopzer Chen
2020-05-18  6:26     ` Lecopzer Chen
2020-05-18 10:45     ` Mark Rutland
2020-05-18 10:45       ` Mark Rutland
2020-05-18 10:45       ` Mark Rutland
2020-05-18 11:17       ` Alexandru Elisei
2020-05-18 11:17         ` Alexandru Elisei
2020-05-18 11:17         ` Alexandru Elisei
2020-05-18 14:09         ` Sumit Garg
2020-05-18 14:09           ` Sumit Garg
2020-05-18 14:09           ` Sumit Garg
2020-05-18 14:19           ` Mark Rutland
2020-05-18 14:19             ` Mark Rutland
2020-05-18 14:19             ` Mark Rutland
2020-05-19  6:48             ` Sumit Garg
2020-05-19  6:48               ` Sumit Garg
2020-05-19  6:48               ` Sumit Garg
2020-05-20  6:55         ` Song Bao Hua
2020-05-20  6:55           ` Song Bao Hua
2020-05-20  6:55           ` Song Bao Hua
2020-05-20 10:30         ` Alexandru Elisei
2020-05-20 10:30           ` Alexandru Elisei
2020-05-20 10:30           ` Alexandru Elisei
2020-05-21  3:00           ` Song Bao Hua (Barry Song)
2020-05-21  3:00             ` Song Bao Hua (Barry Song)
2020-05-21  3:00             ` Song Bao Hua (Barry Song)
2020-05-21 12:36             ` Alexandru Elisei
2020-05-21 12:36               ` Alexandru Elisei
2020-05-21 12:36               ` Alexandru Elisei

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