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From: Catalin Marinas <catalin.marinas@arm.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Marc Zyngier <maz@kernel.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Steven Price <steven.price@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>, Dave Martin <Dave.Martin@arm.com>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 0/2] MTE support for KVM guest
Date: Wed, 24 Jun 2020 10:38:48 +0100	[thread overview]
Message-ID: <20200624093846.GA11863@gaia> (raw)
In-Reply-To: <CAFEAcA8Myn_QEjfk4Ka604PDAUAWXs6dLUY5bEQ98C__oMsmhA@mail.gmail.com>

On Tue, Jun 23, 2020 at 07:05:07PM +0100, Peter Maydell wrote:
> On Wed, 17 Jun 2020 at 13:39, Steven Price <steven.price@arm.com> wrote:
> > These patches add support to KVM to enable MTE within a guest. It is
> > based on Catalin's v4 MTE user space series[1].
> >
> > [1] http://lkml.kernel.org/r/20200515171612.1020-1-catalin.marinas%40arm.com
> >
> > Posting as an RFC as I'd like feedback on the approach taken.
> 
> What's your plan for handling tags across VM migration?
> Will the kernel expose the tag ram to userspace so we
> can copy it from the source machine to the destination
> at the same time as we copy the actual ram contents ?

Qemu can map the guest memory with PROT_MTE and access the tags directly
with LDG/STG instructions. Steven was actually asking in the cover
letter whether we should require that the VMM maps the guest memory with
PROT_MTE as a guarantee that it can access the guest tags.

There is no architecturally visible tag ram (tag storage), that's a
microarchitecture detail.

-- 
Catalin
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Marc Zyngier <maz@kernel.org>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Steven Price <steven.price@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>, Dave Martin <Dave.Martin@arm.com>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 0/2] MTE support for KVM guest
Date: Wed, 24 Jun 2020 10:38:48 +0100	[thread overview]
Message-ID: <20200624093846.GA11863@gaia> (raw)
In-Reply-To: <CAFEAcA8Myn_QEjfk4Ka604PDAUAWXs6dLUY5bEQ98C__oMsmhA@mail.gmail.com>

On Tue, Jun 23, 2020 at 07:05:07PM +0100, Peter Maydell wrote:
> On Wed, 17 Jun 2020 at 13:39, Steven Price <steven.price@arm.com> wrote:
> > These patches add support to KVM to enable MTE within a guest. It is
> > based on Catalin's v4 MTE user space series[1].
> >
> > [1] http://lkml.kernel.org/r/20200515171612.1020-1-catalin.marinas%40arm.com
> >
> > Posting as an RFC as I'd like feedback on the approach taken.
> 
> What's your plan for handling tags across VM migration?
> Will the kernel expose the tag ram to userspace so we
> can copy it from the source machine to the destination
> at the same time as we copy the actual ram contents ?

Qemu can map the guest memory with PROT_MTE and access the tags directly
with LDG/STG instructions. Steven was actually asking in the cover
letter whether we should require that the VMM maps the guest memory with
PROT_MTE as a guarantee that it can access the guest tags.

There is no architecturally visible tag ram (tag storage), that's a
microarchitecture detail.

-- 
Catalin

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Steven Price <steven.price@arm.com>,
	Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
	Dave Martin <Dave.Martin@arm.com>,
	lkml - Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	kvmarm@lists.cs.columbia.edu,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 0/2] MTE support for KVM guest
Date: Wed, 24 Jun 2020 10:38:48 +0100	[thread overview]
Message-ID: <20200624093846.GA11863@gaia> (raw)
In-Reply-To: <CAFEAcA8Myn_QEjfk4Ka604PDAUAWXs6dLUY5bEQ98C__oMsmhA@mail.gmail.com>

On Tue, Jun 23, 2020 at 07:05:07PM +0100, Peter Maydell wrote:
> On Wed, 17 Jun 2020 at 13:39, Steven Price <steven.price@arm.com> wrote:
> > These patches add support to KVM to enable MTE within a guest. It is
> > based on Catalin's v4 MTE user space series[1].
> >
> > [1] http://lkml.kernel.org/r/20200515171612.1020-1-catalin.marinas%40arm.com
> >
> > Posting as an RFC as I'd like feedback on the approach taken.
> 
> What's your plan for handling tags across VM migration?
> Will the kernel expose the tag ram to userspace so we
> can copy it from the source machine to the destination
> at the same time as we copy the actual ram contents ?

Qemu can map the guest memory with PROT_MTE and access the tags directly
with LDG/STG instructions. Steven was actually asking in the cover
letter whether we should require that the VMM maps the guest memory with
PROT_MTE as a guarantee that it can access the guest tags.

There is no architecturally visible tag ram (tag storage), that's a
microarchitecture detail.

-- 
Catalin

  reply	other threads:[~2020-06-24  9:38 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-17 12:38 [RFC PATCH 0/2] MTE support for KVM guest Steven Price
2020-06-17 12:38 ` Steven Price
2020-06-17 12:38 ` Steven Price
2020-06-17 12:38 ` [RFC PATCH 1/2] arm64: kvm: Save/restore MTE registers Steven Price
2020-06-17 12:38   ` Steven Price
2020-06-17 12:38   ` Steven Price
2020-06-17 14:05   ` Catalin Marinas
2020-06-17 14:05     ` Catalin Marinas
2020-06-17 14:05     ` Catalin Marinas
2020-06-18 10:43     ` Steven Price
2020-06-18 10:43       ` Steven Price
2020-06-18 10:43       ` Steven Price
2020-06-17 12:38 ` [RFC PATCH 2/2] arm64: kvm: Introduce MTE VCPU feature Steven Price
2020-06-17 12:38   ` Steven Price
2020-06-17 12:38   ` Steven Price
2020-06-17 14:38   ` Catalin Marinas
2020-06-17 14:38     ` Catalin Marinas
2020-06-17 14:38     ` Catalin Marinas
2020-06-17 15:34     ` Steven Price
2020-06-17 15:34       ` Steven Price
2020-06-17 15:34       ` Steven Price
2020-06-26 16:40       ` James Morse
2020-06-26 16:40         ` James Morse
2020-06-26 16:40         ` James Morse
2020-06-23 17:48 ` [RFC PATCH 0/2] MTE support for KVM guest Catalin Marinas
2020-06-23 17:48   ` Catalin Marinas
2020-06-23 17:48   ` Catalin Marinas
2020-06-24 11:16   ` Steven Price
2020-06-24 11:16     ` Steven Price
2020-06-24 11:16     ` Steven Price
2020-06-24 14:21     ` Catalin Marinas
2020-06-24 14:21       ` Catalin Marinas
2020-06-24 14:21       ` Catalin Marinas
2020-06-24 14:59       ` Steven Price
2020-06-24 14:59         ` Steven Price
2020-06-24 14:59         ` Steven Price
2020-06-24 16:24         ` Catalin Marinas
2020-06-24 16:24           ` Catalin Marinas
2020-06-24 16:24           ` Catalin Marinas
2020-06-26 17:24           ` James Morse
2020-06-26 17:24             ` James Morse
2020-06-26 17:24             ` James Morse
2020-06-23 18:05 ` Peter Maydell
2020-06-23 18:05   ` Peter Maydell
2020-06-23 18:05   ` Peter Maydell
2020-06-24  9:38   ` Catalin Marinas [this message]
2020-06-24  9:38     ` Catalin Marinas
2020-06-24  9:38     ` Catalin Marinas
2020-06-24 10:34     ` Dave Martin
2020-06-24 10:34       ` Dave Martin
2020-06-24 10:34       ` Dave Martin
2020-06-24 11:03       ` Steven Price
2020-06-24 11:03         ` Steven Price
2020-06-24 11:03         ` Steven Price
2020-06-24 11:09         ` Catalin Marinas
2020-06-24 11:09           ` Catalin Marinas
2020-06-24 11:09           ` Catalin Marinas
2020-06-24 11:18           ` Steven Price
2020-06-24 11:18             ` Steven Price
2020-06-24 11:18             ` Steven Price
2020-06-24 11:52             ` Catalin Marinas
2020-06-24 11:52               ` Catalin Marinas
2020-06-24 11:52               ` Catalin Marinas
2020-06-24 13:16             ` Peter Maydell
2020-06-24 13:16               ` Peter Maydell
2020-06-24 13:16               ` Peter Maydell

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