From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: snikam@nvidia.com, mperttunen@nvidia.com, bhuntsman@nvidia.com,
will@kernel.org, linux-kernel@vger.kernel.org,
praithatha@nvidia.com, talho@nvidia.com,
iommu@lists.linux-foundation.org, nicolinc@nvidia.com,
linux-tegra@vger.kernel.org, yhsu@nvidia.com, treding@nvidia.com,
robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org,
bbiswas@nvidia.com
Subject: Re: [PATCH v7 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage
Date: Mon, 29 Jun 2020 14:51:24 -0700 [thread overview]
Message-ID: <20200629215124.GD27967@Asurada-Nvidia> (raw)
In-Reply-To: <20200629022838.29628-2-vdumpa@nvidia.com>
On Sun, Jun 28, 2020 at 07:28:36PM -0700, Krishna Reddy wrote:
> NVIDIA's Tegra194 SoC uses two ARM MMU-500s together to interleave
> IOVA accesses across them.
> Add NVIDIA implementation for dual ARM MMU-500s and add new compatible
> string for Tegra194 SoC SMMU topology.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> +static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu,
> + unsigned int inst, int page)
> +{
> + struct nvidia_smmu *nvidia_smmu = to_nvidia_smmu(smmu);
> +
> + if (!nvidia_smmu->bases[0])
> + nvidia_smmu->bases[0] = smmu->base;
> +
> + return nvidia_smmu->bases[inst] + (page << smmu->pgshift);
> +}
Not critical -- just a nit: why not put the bases[0] in init()?
Everything else looks good to me:
Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicoleotsuka-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Krishna Reddy <vdumpa-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: snikam-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
bhuntsman-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
will-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
praithatha-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
talho-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
nicolinc-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
yhsu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
robin.murphy-5wv7dgnIgG8@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
bbiswas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
Subject: Re: [PATCH v7 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage
Date: Mon, 29 Jun 2020 14:51:24 -0700 [thread overview]
Message-ID: <20200629215124.GD27967@Asurada-Nvidia> (raw)
In-Reply-To: <20200629022838.29628-2-vdumpa-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On Sun, Jun 28, 2020 at 07:28:36PM -0700, Krishna Reddy wrote:
> NVIDIA's Tegra194 SoC uses two ARM MMU-500s together to interleave
> IOVA accesses across them.
> Add NVIDIA implementation for dual ARM MMU-500s and add new compatible
> string for Tegra194 SoC SMMU topology.
>
> Signed-off-by: Krishna Reddy <vdumpa-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> +static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu,
> + unsigned int inst, int page)
> +{
> + struct nvidia_smmu *nvidia_smmu = to_nvidia_smmu(smmu);
> +
> + if (!nvidia_smmu->bases[0])
> + nvidia_smmu->bases[0] = smmu->base;
> +
> + return nvidia_smmu->bases[inst] + (page << smmu->pgshift);
> +}
Not critical -- just a nit: why not put the bases[0] in init()?
Everything else looks good to me:
Reviewed-by: Nicolin Chen <nicoleotsuka-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: snikam@nvidia.com, mperttunen@nvidia.com, bhuntsman@nvidia.com,
will@kernel.org, joro@8bytes.org, linux-kernel@vger.kernel.org,
praithatha@nvidia.com, talho@nvidia.com,
iommu@lists.linux-foundation.org, nicolinc@nvidia.com,
linux-tegra@vger.kernel.org, yhsu@nvidia.com, treding@nvidia.com,
robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org,
bbiswas@nvidia.com
Subject: Re: [PATCH v7 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage
Date: Mon, 29 Jun 2020 14:51:24 -0700 [thread overview]
Message-ID: <20200629215124.GD27967@Asurada-Nvidia> (raw)
In-Reply-To: <20200629022838.29628-2-vdumpa@nvidia.com>
On Sun, Jun 28, 2020 at 07:28:36PM -0700, Krishna Reddy wrote:
> NVIDIA's Tegra194 SoC uses two ARM MMU-500s together to interleave
> IOVA accesses across them.
> Add NVIDIA implementation for dual ARM MMU-500s and add new compatible
> string for Tegra194 SoC SMMU topology.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> +static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu,
> + unsigned int inst, int page)
> +{
> + struct nvidia_smmu *nvidia_smmu = to_nvidia_smmu(smmu);
> +
> + if (!nvidia_smmu->bases[0])
> + nvidia_smmu->bases[0] = smmu->base;
> +
> + return nvidia_smmu->bases[inst] + (page << smmu->pgshift);
> +}
Not critical -- just a nit: why not put the bases[0] in init()?
Everything else looks good to me:
Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
linux-arm-kernel@lists.infradead.org,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
linux-tegra@vger.kernel.org, treding@nvidia.com, yhsu@nvidia.com,
snikam@nvidia.com, praithatha@nvidia.com, talho@nvidia.com,
bbiswas@nvidia.com, mperttunen@nvidia.com, nicolinc@nvidia.com,
bhuntsman@nvidia.com
Subject: Re: [PATCH v7 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage
Date: Mon, 29 Jun 2020 14:51:24 -0700 [thread overview]
Message-ID: <20200629215124.GD27967@Asurada-Nvidia> (raw)
In-Reply-To: <20200629022838.29628-2-vdumpa@nvidia.com>
On Sun, Jun 28, 2020 at 07:28:36PM -0700, Krishna Reddy wrote:
> NVIDIA's Tegra194 SoC uses two ARM MMU-500s together to interleave
> IOVA accesses across them.
> Add NVIDIA implementation for dual ARM MMU-500s and add new compatible
> string for Tegra194 SoC SMMU topology.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> +static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu,
> + unsigned int inst, int page)
> +{
> + struct nvidia_smmu *nvidia_smmu = to_nvidia_smmu(smmu);
> +
> + if (!nvidia_smmu->bases[0])
> + nvidia_smmu->bases[0] = smmu->base;
> +
> + return nvidia_smmu->bases[inst] + (page << smmu->pgshift);
> +}
Not critical -- just a nit: why not put the bases[0] in init()?
Everything else looks good to me:
Reviewed-by: Nicolin Chen <nicoleotsuka@gmail.com>
next prev parent reply other threads:[~2020-06-29 21:52 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-29 2:28 [PATCH v7 0/3] Nvidia Arm SMMUv2 Implementation Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` [PATCH v7 1/3] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 21:51 ` Nicolin Chen [this message]
2020-06-29 21:51 ` Nicolin Chen
2020-06-29 21:51 ` Nicolin Chen
2020-06-29 21:51 ` Nicolin Chen
2020-06-29 22:49 ` Krishna Reddy
2020-06-29 22:49 ` Krishna Reddy
2020-06-29 22:49 ` Krishna Reddy
2020-06-29 22:49 ` Krishna Reddy
2020-06-29 23:52 ` Nicolin Chen
2020-06-29 23:52 ` Nicolin Chen
2020-06-29 23:52 ` Nicolin Chen
2020-06-30 10:23 ` Jon Hunter
2020-06-30 10:23 ` Jon Hunter
2020-06-30 10:23 ` Jon Hunter
2020-06-30 10:23 ` Jon Hunter
2020-06-30 10:46 ` Robin Murphy
2020-06-30 10:46 ` Robin Murphy
2020-06-30 10:46 ` Robin Murphy
2020-06-30 10:46 ` Robin Murphy
2020-06-29 2:28 ` [PATCH v7 2/3] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` [PATCH v7 3/3] iommu/arm-smmu: Add global/context fault implementation hooks Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 2:28 ` Krishna Reddy
2020-06-29 22:38 ` Nicolin Chen
2020-06-29 22:38 ` Nicolin Chen
2020-06-29 22:38 ` Nicolin Chen
2020-06-29 22:38 ` Nicolin Chen
2020-06-29 23:28 ` Krishna Reddy
2020-06-29 23:28 ` Krishna Reddy
2020-06-29 23:28 ` Krishna Reddy
2020-06-29 23:28 ` Krishna Reddy
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