From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Karthik B S <karthik.b.s@intel.com>
Cc: paulo.r.zanoni@intel.com, michel@daenzer.net,
dri-devel@lists.freedesktop.org, nicholas.kazlauskas@amd.com,
daniel.vetter@intel.com, harry.wentland@amd.com,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v6 5/7] drm/i915: Add dedicated plane hook for async flip case
Date: Tue, 1 Sep 2020 14:27:17 +0300 [thread overview]
Message-ID: <20200901112717.GJ6112@intel.com> (raw)
In-Reply-To: <20200807093551.10673-6-karthik.b.s@intel.com>
On Fri, Aug 07, 2020 at 03:05:49PM +0530, Karthik B S wrote:
> This hook is added to avoid writing other plane registers in case of
> async flips, so that we do not write the double buffered registers
> during async surface address update.
>
> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_sprite.c | 25 +++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 2b2d96c59d7f..1c03546a4d2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -609,6 +609,24 @@ icl_program_input_csc(struct intel_plane *plane,
> PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0);
> }
>
> +static void
> +skl_program_async_surface_address(struct drm_i915_private *dev_priv,
> + const struct intel_plane_state *plane_state,
> + enum pipe pipe, enum plane_id plane_id,
> + u32 surf_addr)
> +{
> + unsigned long irqflags;
> + u32 plane_ctl = plane_state->ctl;
Need the bits from skl_plane_ctl_crtc() too.
> +
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +
> + intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> + intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> + intel_plane_ggtt_offset(plane_state) + surf_addr);
> +
> + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +}
> +
> static void
> skl_program_plane(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state,
> @@ -637,6 +655,13 @@ skl_program_plane(struct intel_plane *plane,
> u32 keymsk, keymax;
> u32 plane_ctl = plane_state->ctl;
>
> + /* During Async flip, no other updates are allowed */
> + if (crtc_state->uapi.async_flip) {
> + skl_program_async_surface_address(dev_priv, plane_state,
> + pipe, plane_id, surf_addr);
> + return;
> + }
I'd suggest adding a vfunc for this. Should be able to call it from
intel_update_plane(). That way we don't need to patch it into each
and every .update_plane() implementation.
> +
> plane_ctl |= skl_plane_ctl_crtc(crtc_state);
>
> if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> --
> 2.22.0
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Karthik B S <karthik.b.s@intel.com>
Cc: paulo.r.zanoni@intel.com, michel@daenzer.net,
dri-devel@lists.freedesktop.org, nicholas.kazlauskas@amd.com,
vandita.kulkarni@intel.com, uma.shankar@intel.com,
daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v6 5/7] drm/i915: Add dedicated plane hook for async flip case
Date: Tue, 1 Sep 2020 14:27:17 +0300 [thread overview]
Message-ID: <20200901112717.GJ6112@intel.com> (raw)
In-Reply-To: <20200807093551.10673-6-karthik.b.s@intel.com>
On Fri, Aug 07, 2020 at 03:05:49PM +0530, Karthik B S wrote:
> This hook is added to avoid writing other plane registers in case of
> async flips, so that we do not write the double buffered registers
> during async surface address update.
>
> Signed-off-by: Karthik B S <karthik.b.s@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_sprite.c | 25 +++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 2b2d96c59d7f..1c03546a4d2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -609,6 +609,24 @@ icl_program_input_csc(struct intel_plane *plane,
> PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0);
> }
>
> +static void
> +skl_program_async_surface_address(struct drm_i915_private *dev_priv,
> + const struct intel_plane_state *plane_state,
> + enum pipe pipe, enum plane_id plane_id,
> + u32 surf_addr)
> +{
> + unsigned long irqflags;
> + u32 plane_ctl = plane_state->ctl;
Need the bits from skl_plane_ctl_crtc() too.
> +
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +
> + intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> + intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> + intel_plane_ggtt_offset(plane_state) + surf_addr);
> +
> + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +}
> +
> static void
> skl_program_plane(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state,
> @@ -637,6 +655,13 @@ skl_program_plane(struct intel_plane *plane,
> u32 keymsk, keymax;
> u32 plane_ctl = plane_state->ctl;
>
> + /* During Async flip, no other updates are allowed */
> + if (crtc_state->uapi.async_flip) {
> + skl_program_async_surface_address(dev_priv, plane_state,
> + pipe, plane_id, surf_addr);
> + return;
> + }
I'd suggest adding a vfunc for this. Should be able to call it from
intel_update_plane(). That way we don't need to patch it into each
and every .update_plane() implementation.
> +
> plane_ctl |= skl_plane_ctl_crtc(crtc_state);
>
> if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> --
> 2.22.0
--
Ville Syrjälä
Intel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-09-01 11:27 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-07 9:35 [Intel-gfx] [PATCH v6 0/7] Asynchronous flip implementation for i915 Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-08-07 9:35 ` [Intel-gfx] [PATCH v6 1/7] drm/i915: Add enable/disable flip done and flip done handler Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-09-01 11:12 ` [Intel-gfx] " Ville Syrjälä
2020-09-01 11:12 ` Ville Syrjälä
2020-09-02 13:24 ` [Intel-gfx] " Karthik B S
2020-09-02 13:24 ` Karthik B S
2020-09-01 11:40 ` [Intel-gfx] " Ville Syrjälä
2020-09-01 11:40 ` Ville Syrjälä
2020-09-02 14:12 ` [Intel-gfx] " Karthik B S
2020-09-02 14:12 ` Karthik B S
2020-08-07 9:35 ` [Intel-gfx] [PATCH v6 2/7] drm/i915: Add support for async flips in I915 Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-09-01 11:15 ` [Intel-gfx] " Ville Syrjälä
2020-09-01 11:15 ` Ville Syrjälä
2020-09-02 13:28 ` [Intel-gfx] " Karthik B S
2020-09-02 13:28 ` Karthik B S
2020-08-07 9:35 ` [Intel-gfx] [PATCH v6 3/7] drm/i915: Add checks specific to async flips Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-09-01 11:21 ` [Intel-gfx] " Ville Syrjälä
2020-09-01 11:21 ` Ville Syrjälä
2020-09-02 13:44 ` [Intel-gfx] " Karthik B S
2020-09-02 13:44 ` Karthik B S
2020-08-07 9:35 ` [Intel-gfx] [PATCH v6 4/7] drm/i915: Do not call drm_crtc_arm_vblank_event in " Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-09-01 11:23 ` [Intel-gfx] " Ville Syrjälä
2020-09-01 11:23 ` Ville Syrjälä
2020-09-02 13:47 ` [Intel-gfx] " Karthik B S
2020-09-02 13:47 ` Karthik B S
2020-08-07 9:35 ` [Intel-gfx] [PATCH v6 5/7] drm/i915: Add dedicated plane hook for async flip case Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-09-01 11:27 ` Ville Syrjälä [this message]
2020-09-01 11:27 ` Ville Syrjälä
2020-09-02 13:52 ` [Intel-gfx] " Karthik B S
2020-09-02 13:52 ` Karthik B S
2020-08-07 9:35 ` [Intel-gfx] [PATCH v6 6/7] Documentation/gpu: Add asynchronous flip documentation for i915 Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-08-07 9:35 ` [Intel-gfx] [PATCH v6 7/7] drm/i915: Enable async flips in i915 Karthik B S
2020-08-07 9:35 ` Karthik B S
2020-08-07 13:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Asynchronous flip implementation for i915 (rev6) Patchwork
2020-08-07 13:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-08-07 17:10 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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