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From: Joerg Roedel <jroedel@suse.de>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: James Sewart <jamessewart@arista.com>,
	iommu@lists.linux-foundation.org,
	intel-gfx@lists.freedesktop.org, stable@vger.kernel.org,
	Lu Baolu <baolu.lu@linux.intel.com>
Subject: Re: [Intel-gfx] [PATCH] iommu/intel: Handle 36b addressing for x86-32
Date: Fri, 4 Sep 2020 12:14:52 +0200	[thread overview]
Message-ID: <20200904101452.GD28643@suse.de> (raw)
In-Reply-To: <20200822160209.28512-1-chris@chris-wilson.co.uk>

On Sat, Aug 22, 2020 at 05:02:09PM +0100, Chris Wilson wrote:
> Beware that the address size for x86-32 may exceed unsigned long.
> 
> [    0.368971] UBSAN: shift-out-of-bounds in drivers/iommu/intel/iommu.c:128:14
> [    0.369055] shift exponent 36 is too large for 32-bit type 'long unsigned int'
> 
> If we don't handle the wide addresses, the pages are mismapped and the
> device read/writes go astray, detected as DMAR faults and leading to
> device failure. The behaviour changed (from working to broken) in commit
> fa954e683178 ("iommu/vt-d: Delegate the dma domain to upper layer"), but
> the error looks older.
> 
> Fixes: fa954e683178 ("iommu/vt-d: Delegate the dma domain to upper layer")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: James Sewart <jamessewart@arista.com>
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: Joerg Roedel <jroedel@suse.de>
> Cc: <stable@vger.kernel.org> # v5.3+
> ---
>  drivers/iommu/intel/iommu.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)

Applied for v5.9, thanks.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <jroedel@suse.de>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: iommu@lists.linux-foundation.org,
	intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [PATCH] iommu/intel: Handle 36b addressing for x86-32
Date: Fri, 4 Sep 2020 12:14:52 +0200	[thread overview]
Message-ID: <20200904101452.GD28643@suse.de> (raw)
In-Reply-To: <20200822160209.28512-1-chris@chris-wilson.co.uk>

On Sat, Aug 22, 2020 at 05:02:09PM +0100, Chris Wilson wrote:
> Beware that the address size for x86-32 may exceed unsigned long.
> 
> [    0.368971] UBSAN: shift-out-of-bounds in drivers/iommu/intel/iommu.c:128:14
> [    0.369055] shift exponent 36 is too large for 32-bit type 'long unsigned int'
> 
> If we don't handle the wide addresses, the pages are mismapped and the
> device read/writes go astray, detected as DMAR faults and leading to
> device failure. The behaviour changed (from working to broken) in commit
> fa954e683178 ("iommu/vt-d: Delegate the dma domain to upper layer"), but
> the error looks older.
> 
> Fixes: fa954e683178 ("iommu/vt-d: Delegate the dma domain to upper layer")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: James Sewart <jamessewart@arista.com>
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: Joerg Roedel <jroedel@suse.de>
> Cc: <stable@vger.kernel.org> # v5.3+
> ---
>  drivers/iommu/intel/iommu.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)

Applied for v5.9, thanks.
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <jroedel@suse.de>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: iommu@lists.linux-foundation.org,
	intel-gfx@lists.freedesktop.org,
	James Sewart <jamessewart@arista.com>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH] iommu/intel: Handle 36b addressing for x86-32
Date: Fri, 4 Sep 2020 12:14:52 +0200	[thread overview]
Message-ID: <20200904101452.GD28643@suse.de> (raw)
In-Reply-To: <20200822160209.28512-1-chris@chris-wilson.co.uk>

On Sat, Aug 22, 2020 at 05:02:09PM +0100, Chris Wilson wrote:
> Beware that the address size for x86-32 may exceed unsigned long.
> 
> [    0.368971] UBSAN: shift-out-of-bounds in drivers/iommu/intel/iommu.c:128:14
> [    0.369055] shift exponent 36 is too large for 32-bit type 'long unsigned int'
> 
> If we don't handle the wide addresses, the pages are mismapped and the
> device read/writes go astray, detected as DMAR faults and leading to
> device failure. The behaviour changed (from working to broken) in commit
> fa954e683178 ("iommu/vt-d: Delegate the dma domain to upper layer"), but
> the error looks older.
> 
> Fixes: fa954e683178 ("iommu/vt-d: Delegate the dma domain to upper layer")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: James Sewart <jamessewart@arista.com>
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: Joerg Roedel <jroedel@suse.de>
> Cc: <stable@vger.kernel.org> # v5.3+
> ---
>  drivers/iommu/intel/iommu.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)

Applied for v5.9, thanks.

  parent reply	other threads:[~2020-09-04 10:14 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-22 16:02 [Intel-gfx] [PATCH] iommu/intel: Handle 36b addressing for x86-32 Chris Wilson
2020-08-22 16:02 ` Chris Wilson
2020-08-22 16:02 ` Chris Wilson
2020-08-22 16:08 ` [Intel-gfx] " Chris Wilson
2020-08-22 16:08   ` Chris Wilson
2020-08-22 16:08   ` Chris Wilson
2020-08-22 16:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-08-22 16:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-08-22 17:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-08-25  3:13 ` [Intel-gfx] [PATCH] " Lu Baolu
2020-08-25  3:13   ` Lu Baolu
2020-08-25  3:13   ` Lu Baolu
2020-09-04 10:14 ` Joerg Roedel [this message]
2020-09-04 10:14   ` Joerg Roedel
2020-09-04 10:14   ` Joerg Roedel

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