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From: Christoph Hellwig <hch@lst.de>
To: Anup Patel <anup.patel@wdc.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	linux-kernel@vger.kernel.org, Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv@lists.infradead.org, Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH] RISC-V: Allow drivers to provide custom read_cycles64 for M-mode kernel
Date: Fri, 4 Sep 2020 18:25:30 +0200	[thread overview]
Message-ID: <20200904162530.GA32095@lst.de> (raw)
In-Reply-To: <20200904162121.279578-1-anup.patel@wdc.com>

On Fri, Sep 04, 2020 at 09:51:21PM +0530, Anup Patel wrote:
> The TIME CSR is usually not present on most RISC-V systems so the
> M-mode firmware will emulate the TIME CSR for the S-mode (MMU) kernel
> whereas the M-mode (NoMMU) kernel will have to use MMIO clocksource.
> 
> Currently, the get_cycles() implementation in asm/timex.h does not
> consider the above fact so we provide alternate implementation of
> the get_cycles() for the M-mode (NoMMU) kernel which expects drivers
> to provide custom MMIO based read_cycles64() method.

Please just go back to the previous working version without all the
crazy indirections.

The whole timer and irq code has been turned into a giant maze of
indirections lately.

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WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Anup Patel <anup.patel@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Christoph Hellwig <hch@lst.de>, Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] RISC-V: Allow drivers to provide custom read_cycles64 for M-mode kernel
Date: Fri, 4 Sep 2020 18:25:30 +0200	[thread overview]
Message-ID: <20200904162530.GA32095@lst.de> (raw)
In-Reply-To: <20200904162121.279578-1-anup.patel@wdc.com>

On Fri, Sep 04, 2020 at 09:51:21PM +0530, Anup Patel wrote:
> The TIME CSR is usually not present on most RISC-V systems so the
> M-mode firmware will emulate the TIME CSR for the S-mode (MMU) kernel
> whereas the M-mode (NoMMU) kernel will have to use MMIO clocksource.
> 
> Currently, the get_cycles() implementation in asm/timex.h does not
> consider the above fact so we provide alternate implementation of
> the get_cycles() for the M-mode (NoMMU) kernel which expects drivers
> to provide custom MMIO based read_cycles64() method.

Please just go back to the previous working version without all the
crazy indirections.

The whole timer and irq code has been turned into a giant maze of
indirections lately.

  reply	other threads:[~2020-09-04 16:25 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-04 16:21 [PATCH] RISC-V: Allow drivers to provide custom read_cycles64 for M-mode kernel Anup Patel
2020-09-04 16:21 ` Anup Patel
2020-09-04 16:25 ` Christoph Hellwig [this message]
2020-09-04 16:25   ` Christoph Hellwig
2020-09-04 16:43   ` Anup Patel
2020-09-04 16:43     ` Anup Patel
2020-09-04 16:57     ` Christoph Hellwig
2020-09-04 16:57       ` Christoph Hellwig
2020-09-05  1:17       ` Palmer Dabbelt
2020-09-05  1:17         ` Palmer Dabbelt
2020-09-05  3:44         ` Anup Patel
2020-09-05  3:44           ` Anup Patel
2020-09-05  5:35           ` Anup Patel
2020-09-05  5:35             ` Anup Patel
2020-09-07  6:18             ` Christoph Hellwig
2020-09-07  6:18               ` Christoph Hellwig
2020-09-07  9:59               ` Anup Patel
2020-09-07  9:59                 ` Anup Patel

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