From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
Zhen Lei <thunder.leizhen@huawei.com>,
Russell King <rmk+kernel@armlinux.org.uk>,
Linus Walleij <linus.walleij@linaro.org>,
Nicolas Pitre <nico@fluxnic.net>
Subject: [PATCH v2 08/10] ARM: p2v: simplify __fixup_pv_table()
Date: Mon, 21 Sep 2020 17:41:15 +0200 [thread overview]
Message-ID: <20200921154117.757-9-ardb@kernel.org> (raw)
In-Reply-To: <20200921154117.757-1-ardb@kernel.org>
Declutter the code in __fixup_pv_table() by using the new adr_l/str_l
macros to take PC relative references to external symbols, and by
using the value of PHYS_OFFSET passed in r8 to calculate the p2v
offset.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm/kernel/phys2virt.S | 34 ++++++++------------
1 file changed, 14 insertions(+), 20 deletions(-)
diff --git a/arch/arm/kernel/phys2virt.S b/arch/arm/kernel/phys2virt.S
index 8e4be15e1559..be8fb0d89877 100644
--- a/arch/arm/kernel/phys2virt.S
+++ b/arch/arm/kernel/phys2virt.S
@@ -29,33 +29,27 @@
*/
__HEAD
ENTRY(__fixup_pv_table)
- adr r0, 1f
- ldmia r0, {r3-r7}
- mvn ip, #0
- subs r3, r0, r3 @ PHYS_OFFSET - PAGE_OFFSET
- add r4, r4, r3 @ adjust table start address
- add r5, r5, r3 @ adjust table end address
- add r6, r6, r3 @ adjust __pv_phys_pfn_offset address
- add r7, r7, r3 @ adjust __pv_offset address
mov r0, r8, lsr #PAGE_SHIFT @ convert to PFN
- str r0, [r6] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset
- strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits
- mov r6, r3, lsr #24 @ constant for add/sub instructions
- teq r3, r6, lsl #24 @ must be 16MiB aligned
+ str_l r0, __pv_phys_pfn_offset, r3
+
+ adr_l r0, __pv_offset
+ subs r3, r8, #PAGE_OFFSET @ PHYS_OFFSET - PAGE_OFFSET
+ mvn ip, #0
+ strcc ip, [r0, #HIGH_OFFSET] @ save to __pv_offset high bits
+ str r3, [r0, #LOW_OFFSET] @ save to __pv_offset low bits
+
+ mov r0, r3, lsr #24 @ constant for add/sub instructions
+ teq r3, r0, lsl #24 @ must be 16MiB aligned
bne 0f
- str r3, [r7, #LOW_OFFSET] @ save to __pv_offset low bits
+
+ adr_l r4, __pv_table_begin
+ adr_l r5, __pv_table_end
b __fixup_a_pv_table
+
0: mov r0, r0 @ deadloop on error
b 0b
ENDPROC(__fixup_pv_table)
- .align
-1: .long .
- .long __pv_table_begin
- .long __pv_table_end
-2: .long __pv_phys_pfn_offset
- .long __pv_offset
-
.text
__fixup_a_pv_table:
adr_l r6, __pv_offset
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org, Nicolas Pitre <nico@fluxnic.net>,
Linus Walleij <linus.walleij@linaro.org>,
Russell King <rmk+kernel@armlinux.org.uk>,
Zhen Lei <thunder.leizhen@huawei.com>,
Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v2 08/10] ARM: p2v: simplify __fixup_pv_table()
Date: Mon, 21 Sep 2020 17:41:15 +0200 [thread overview]
Message-ID: <20200921154117.757-9-ardb@kernel.org> (raw)
In-Reply-To: <20200921154117.757-1-ardb@kernel.org>
Declutter the code in __fixup_pv_table() by using the new adr_l/str_l
macros to take PC relative references to external symbols, and by
using the value of PHYS_OFFSET passed in r8 to calculate the p2v
offset.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm/kernel/phys2virt.S | 34 ++++++++------------
1 file changed, 14 insertions(+), 20 deletions(-)
diff --git a/arch/arm/kernel/phys2virt.S b/arch/arm/kernel/phys2virt.S
index 8e4be15e1559..be8fb0d89877 100644
--- a/arch/arm/kernel/phys2virt.S
+++ b/arch/arm/kernel/phys2virt.S
@@ -29,33 +29,27 @@
*/
__HEAD
ENTRY(__fixup_pv_table)
- adr r0, 1f
- ldmia r0, {r3-r7}
- mvn ip, #0
- subs r3, r0, r3 @ PHYS_OFFSET - PAGE_OFFSET
- add r4, r4, r3 @ adjust table start address
- add r5, r5, r3 @ adjust table end address
- add r6, r6, r3 @ adjust __pv_phys_pfn_offset address
- add r7, r7, r3 @ adjust __pv_offset address
mov r0, r8, lsr #PAGE_SHIFT @ convert to PFN
- str r0, [r6] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset
- strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits
- mov r6, r3, lsr #24 @ constant for add/sub instructions
- teq r3, r6, lsl #24 @ must be 16MiB aligned
+ str_l r0, __pv_phys_pfn_offset, r3
+
+ adr_l r0, __pv_offset
+ subs r3, r8, #PAGE_OFFSET @ PHYS_OFFSET - PAGE_OFFSET
+ mvn ip, #0
+ strcc ip, [r0, #HIGH_OFFSET] @ save to __pv_offset high bits
+ str r3, [r0, #LOW_OFFSET] @ save to __pv_offset low bits
+
+ mov r0, r3, lsr #24 @ constant for add/sub instructions
+ teq r3, r0, lsl #24 @ must be 16MiB aligned
bne 0f
- str r3, [r7, #LOW_OFFSET] @ save to __pv_offset low bits
+
+ adr_l r4, __pv_table_begin
+ adr_l r5, __pv_table_end
b __fixup_a_pv_table
+
0: mov r0, r0 @ deadloop on error
b 0b
ENDPROC(__fixup_pv_table)
- .align
-1: .long .
- .long __pv_table_begin
- .long __pv_table_end
-2: .long __pv_phys_pfn_offset
- .long __pv_offset
-
.text
__fixup_a_pv_table:
adr_l r6, __pv_offset
--
2.17.1
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next prev parent reply other threads:[~2020-09-21 15:41 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-21 15:41 [PATCH v2 00/10] ARM: p2v: reduce min alignment to 2 MiB Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-21 15:41 ` [PATCH v2 01/10] ARM: p2v: fix handling of LPAE translation in BE mode Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-21 22:18 ` Russell King - ARM Linux admin
2020-09-21 22:18 ` Russell King - ARM Linux admin
2020-09-22 6:54 ` Ard Biesheuvel
2020-09-22 6:54 ` Ard Biesheuvel
2020-09-22 8:23 ` Linus Walleij
2020-09-22 8:23 ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 02/10] ARM: assembler: introduce adr_l, ldr_l and str_l macros Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-22 8:32 ` Linus Walleij
2020-09-22 8:32 ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 03/10] ARM: p2v: move patching code to separate assembler source file Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-22 8:34 ` Linus Walleij
2020-09-22 8:34 ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 04/10] ARM: p2v: factor out shared loop processing Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-22 8:39 ` Linus Walleij
2020-09-22 8:39 ` Linus Walleij
2020-09-22 9:58 ` Ard Biesheuvel
2020-09-22 9:58 ` Ard Biesheuvel
2020-09-21 15:41 ` [PATCH v2 05/10] ARM: p2v: factor out BE8 handling Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-22 8:51 ` Linus Walleij
2020-09-22 8:51 ` Linus Walleij
2020-09-22 10:00 ` Ard Biesheuvel
2020-09-22 10:00 ` Ard Biesheuvel
2020-09-21 15:41 ` [PATCH v2 06/10] ARM: p2v: drop redundant 'type' argument from __pv_stub Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-22 9:02 ` Linus Walleij
2020-09-22 9:02 ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 07/10] ARM: p2v: use relative references in patch site arrays Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-22 9:04 ` Linus Walleij
2020-09-22 9:04 ` Linus Walleij
2020-09-22 9:50 ` Ard Biesheuvel
2020-09-22 9:50 ` Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel [this message]
2020-09-21 15:41 ` [PATCH v2 08/10] ARM: p2v: simplify __fixup_pv_table() Ard Biesheuvel
2020-09-22 9:06 ` Linus Walleij
2020-09-22 9:06 ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 09/10] ARM: p2v: switch to MOVW for Thumb2 and ARM/LPAE Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-21 18:29 ` Nicolas Pitre
2020-09-21 18:29 ` Nicolas Pitre
2020-09-21 18:45 ` Ard Biesheuvel
2020-09-21 18:45 ` Ard Biesheuvel
2020-09-22 9:00 ` Linus Walleij
2020-09-22 9:00 ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 10/10] ARM: p2v: reduce p2v alignment requirement to 2 MiB Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-22 9:11 ` Linus Walleij
2020-09-22 9:11 ` Linus Walleij
2020-09-22 10:23 ` Ard Biesheuvel
2020-09-22 10:23 ` Ard Biesheuvel
2020-09-22 15:12 ` Nicolas Pitre
2020-09-22 15:12 ` Nicolas Pitre
2020-09-22 15:25 ` Ard Biesheuvel
2020-09-22 15:25 ` Ard Biesheuvel
2020-09-21 18:33 ` [PATCH v2 00/10] ARM: p2v: reduce min alignment " Nicolas Pitre
2020-09-21 18:33 ` Nicolas Pitre
2020-09-22 9:12 ` Linus Walleij
2020-09-22 9:12 ` Linus Walleij
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