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From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-efi@vger.kernel.org,
	Zhen Lei <thunder.leizhen@huawei.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Nicolas Pitre <nico@fluxnic.net>
Subject: Re: [PATCH v2 01/10] ARM: p2v: fix handling of LPAE translation in BE mode
Date: Mon, 21 Sep 2020 23:18:28 +0100	[thread overview]
Message-ID: <20200921221828.GZ1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200921154117.757-2-ardb@kernel.org>

On Mon, Sep 21, 2020 at 05:41:08PM +0200, Ard Biesheuvel wrote:
> When running in BE mode on LPAE hardware with a PA-to-VA translation
> that exceeds 4 GB, we patch bits 39:32 of the offset into the wrong
> byte of the opcode. So fix that, by rotating the offset in r0 to the
> right by 8 bits, which will put the 8-bit immediate in bits 31:24.
> 
> Note that this will also move bit #22 in its correct place when
> applying the rotation to the constant #0x400000.
> 
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

Should this have a fixes tag?

> ---
>  arch/arm/kernel/head.S | 6 +-----
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
> index f8904227e7fd..98c1e68bdfcb 100644
> --- a/arch/arm/kernel/head.S
> +++ b/arch/arm/kernel/head.S
> @@ -671,12 +671,8 @@ ARM_BE8(rev16	ip, ip)
>  	ldrcc	r7, [r4], #4	@ use branch for delay slot
>  	bcc	1b
>  	bx	lr
> -#else
> -#ifdef CONFIG_CPU_ENDIAN_BE8
> -	moveq	r0, #0x00004000	@ set bit 22, mov to mvn instruction
>  #else
>  	moveq	r0, #0x400000	@ set bit 22, mov to mvn instruction
> -#endif
>  	b	2f
>  1:	ldr	ip, [r7, r3]
>  #ifdef CONFIG_CPU_ENDIAN_BE8
> @@ -685,7 +681,7 @@ ARM_BE8(rev16	ip, ip)
>  	tst	ip, #0x000f0000	@ check the rotation field
>  	orrne	ip, ip, r6, lsl #24 @ mask in offset bits 31-24
>  	biceq	ip, ip, #0x00004000 @ clear bit 22
> -	orreq	ip, ip, r0      @ mask in offset bits 7-0
> +	orreq	ip, ip, r0, ror #8  @ mask in offset bits 7-0
>  #else
>  	bic	ip, ip, #0x000000ff
>  	tst	ip, #0xf00	@ check the rotation field
> -- 
> 2.17.1
> 
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

WARNING: multiple messages have this Message-ID (diff)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	linux-efi@vger.kernel.org, Nicolas Pitre <nico@fluxnic.net>,
	linux-arm-kernel@lists.infradead.org,
	Zhen Lei <thunder.leizhen@huawei.com>
Subject: Re: [PATCH v2 01/10] ARM: p2v: fix handling of LPAE translation in BE mode
Date: Mon, 21 Sep 2020 23:18:28 +0100	[thread overview]
Message-ID: <20200921221828.GZ1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200921154117.757-2-ardb@kernel.org>

On Mon, Sep 21, 2020 at 05:41:08PM +0200, Ard Biesheuvel wrote:
> When running in BE mode on LPAE hardware with a PA-to-VA translation
> that exceeds 4 GB, we patch bits 39:32 of the offset into the wrong
> byte of the opcode. So fix that, by rotating the offset in r0 to the
> right by 8 bits, which will put the 8-bit immediate in bits 31:24.
> 
> Note that this will also move bit #22 in its correct place when
> applying the rotation to the constant #0x400000.
> 
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

Should this have a fixes tag?

> ---
>  arch/arm/kernel/head.S | 6 +-----
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
> index f8904227e7fd..98c1e68bdfcb 100644
> --- a/arch/arm/kernel/head.S
> +++ b/arch/arm/kernel/head.S
> @@ -671,12 +671,8 @@ ARM_BE8(rev16	ip, ip)
>  	ldrcc	r7, [r4], #4	@ use branch for delay slot
>  	bcc	1b
>  	bx	lr
> -#else
> -#ifdef CONFIG_CPU_ENDIAN_BE8
> -	moveq	r0, #0x00004000	@ set bit 22, mov to mvn instruction
>  #else
>  	moveq	r0, #0x400000	@ set bit 22, mov to mvn instruction
> -#endif
>  	b	2f
>  1:	ldr	ip, [r7, r3]
>  #ifdef CONFIG_CPU_ENDIAN_BE8
> @@ -685,7 +681,7 @@ ARM_BE8(rev16	ip, ip)
>  	tst	ip, #0x000f0000	@ check the rotation field
>  	orrne	ip, ip, r6, lsl #24 @ mask in offset bits 31-24
>  	biceq	ip, ip, #0x00004000 @ clear bit 22
> -	orreq	ip, ip, r0      @ mask in offset bits 7-0
> +	orreq	ip, ip, r0, ror #8  @ mask in offset bits 7-0
>  #else
>  	bic	ip, ip, #0x000000ff
>  	tst	ip, #0xf00	@ check the rotation field
> -- 
> 2.17.1
> 
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

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  reply	other threads:[~2020-09-21 22:18 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-21 15:41 [PATCH v2 00/10] ARM: p2v: reduce min alignment to 2 MiB Ard Biesheuvel
2020-09-21 15:41 ` Ard Biesheuvel
2020-09-21 15:41 ` [PATCH v2 01/10] ARM: p2v: fix handling of LPAE translation in BE mode Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-21 22:18   ` Russell King - ARM Linux admin [this message]
2020-09-21 22:18     ` Russell King - ARM Linux admin
2020-09-22  6:54     ` Ard Biesheuvel
2020-09-22  6:54       ` Ard Biesheuvel
2020-09-22  8:23   ` Linus Walleij
2020-09-22  8:23     ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 02/10] ARM: assembler: introduce adr_l, ldr_l and str_l macros Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  8:32   ` Linus Walleij
2020-09-22  8:32     ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 03/10] ARM: p2v: move patching code to separate assembler source file Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  8:34   ` Linus Walleij
2020-09-22  8:34     ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 04/10] ARM: p2v: factor out shared loop processing Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  8:39   ` Linus Walleij
2020-09-22  8:39     ` Linus Walleij
2020-09-22  9:58     ` Ard Biesheuvel
2020-09-22  9:58       ` Ard Biesheuvel
2020-09-21 15:41 ` [PATCH v2 05/10] ARM: p2v: factor out BE8 handling Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  8:51   ` Linus Walleij
2020-09-22  8:51     ` Linus Walleij
2020-09-22 10:00     ` Ard Biesheuvel
2020-09-22 10:00       ` Ard Biesheuvel
2020-09-21 15:41 ` [PATCH v2 06/10] ARM: p2v: drop redundant 'type' argument from __pv_stub Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  9:02   ` Linus Walleij
2020-09-22  9:02     ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 07/10] ARM: p2v: use relative references in patch site arrays Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  9:04   ` Linus Walleij
2020-09-22  9:04     ` Linus Walleij
2020-09-22  9:50     ` Ard Biesheuvel
2020-09-22  9:50       ` Ard Biesheuvel
2020-09-21 15:41 ` [PATCH v2 08/10] ARM: p2v: simplify __fixup_pv_table() Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  9:06   ` Linus Walleij
2020-09-22  9:06     ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 09/10] ARM: p2v: switch to MOVW for Thumb2 and ARM/LPAE Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-21 18:29   ` Nicolas Pitre
2020-09-21 18:29     ` Nicolas Pitre
2020-09-21 18:45     ` Ard Biesheuvel
2020-09-21 18:45       ` Ard Biesheuvel
2020-09-22  9:00   ` Linus Walleij
2020-09-22  9:00     ` Linus Walleij
2020-09-21 15:41 ` [PATCH v2 10/10] ARM: p2v: reduce p2v alignment requirement to 2 MiB Ard Biesheuvel
2020-09-21 15:41   ` Ard Biesheuvel
2020-09-22  9:11   ` Linus Walleij
2020-09-22  9:11     ` Linus Walleij
2020-09-22 10:23     ` Ard Biesheuvel
2020-09-22 10:23       ` Ard Biesheuvel
2020-09-22 15:12       ` Nicolas Pitre
2020-09-22 15:12         ` Nicolas Pitre
2020-09-22 15:25         ` Ard Biesheuvel
2020-09-22 15:25           ` Ard Biesheuvel
2020-09-21 18:33 ` [PATCH v2 00/10] ARM: p2v: reduce min alignment " Nicolas Pitre
2020-09-21 18:33   ` Nicolas Pitre
2020-09-22  9:12 ` Linus Walleij
2020-09-22  9:12   ` Linus Walleij

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