From: Ramalingam C <ramalingam.c@intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org, seanpaul@chromium.org
Subject: Re: [Intel-gfx] [PATCH v4 11/16] drm/hdcp: Max MST content streams
Date: Thu, 5 Nov 2020 21:39:48 +0530 [thread overview]
Message-ID: <20201105160947.GJ3242@intel.com> (raw)
In-Reply-To: <20201027164208.10026-12-anshuman.gupta@intel.com>
On 2020-10-27 at 22:12:03 +0530, Anshuman Gupta wrote:
> Let's define Maximum MST content streams up to four
> generically which can be supported by modern display
> controllers.
>
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> include/drm/drm_hdcp.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
> index fe58dbb46962..ac22c246542a 100644
> --- a/include/drm/drm_hdcp.h
> +++ b/include/drm/drm_hdcp.h
> @@ -101,11 +101,11 @@
>
> /* Following Macros take a byte at a time for bit(s) masking */
> /*
> - * TODO: This has to be changed for DP MST, as multiple stream on
> - * same port is possible.
> - * For HDCP2.2 on HDMI and DP SST this value is always 1.
> + * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
> + * H/W MST streams capacity.
> + * This required to be moved out to platform specific header.
> */
> -#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1
> +#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 4
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
> #define HDCP_2_2_TXCAP_MASK_LEN 2
> #define HDCP_2_2_RXCAPS_LEN 3
> #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0))
> --
> 2.26.2
>
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Ramalingam C <ramalingam.c@intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org, uma.shankar@intel.com,
seanpaul@chromium.org, juston.li@intel.com
Subject: Re: [PATCH v4 11/16] drm/hdcp: Max MST content streams
Date: Thu, 5 Nov 2020 21:39:48 +0530 [thread overview]
Message-ID: <20201105160947.GJ3242@intel.com> (raw)
In-Reply-To: <20201027164208.10026-12-anshuman.gupta@intel.com>
On 2020-10-27 at 22:12:03 +0530, Anshuman Gupta wrote:
> Let's define Maximum MST content streams up to four
> generically which can be supported by modern display
> controllers.
>
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> include/drm/drm_hdcp.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
> index fe58dbb46962..ac22c246542a 100644
> --- a/include/drm/drm_hdcp.h
> +++ b/include/drm/drm_hdcp.h
> @@ -101,11 +101,11 @@
>
> /* Following Macros take a byte at a time for bit(s) masking */
> /*
> - * TODO: This has to be changed for DP MST, as multiple stream on
> - * same port is possible.
> - * For HDCP2.2 on HDMI and DP SST this value is always 1.
> + * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
> + * H/W MST streams capacity.
> + * This required to be moved out to platform specific header.
> */
> -#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1
> +#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 4
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
> #define HDCP_2_2_TXCAP_MASK_LEN 2
> #define HDCP_2_2_RXCAPS_LEN 3
> #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0))
> --
> 2.26.2
>
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next prev parent reply other threads:[~2020-11-05 16:09 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-27 16:41 [Intel-gfx] [PATCH v4 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 01/16] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-11-02 7:45 ` [Intel-gfx] " Shankar, Uma
2020-11-02 7:45 ` Shankar, Uma
2020-11-05 13:18 ` [Intel-gfx] " Ramalingam C
2020-11-05 13:18 ` Ramalingam C
2020-11-05 13:21 ` [Intel-gfx] " Ramalingam C
2020-11-05 13:21 ` Ramalingam C
2020-11-05 13:26 ` Ramalingam C
2020-11-05 13:26 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 02/16] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-11-02 7:45 ` [Intel-gfx] " Shankar, Uma
2020-11-02 7:45 ` Shankar, Uma
2020-11-05 13:23 ` [Intel-gfx] " Ramalingam C
2020-11-05 13:23 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-11-06 12:00 ` [Intel-gfx] " Ramalingam C
2020-11-06 12:00 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 04/16] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-11-05 13:52 ` [Intel-gfx] " Ramalingam C
2020-11-05 13:52 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-11-05 13:57 ` [Intel-gfx] " Ramalingam C
2020-11-05 13:57 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-11-02 7:47 ` [Intel-gfx] " Shankar, Uma
2020-11-02 7:47 ` Shankar, Uma
2020-11-05 15:34 ` [Intel-gfx] " Ramalingam C
2020-11-05 15:34 ` Ramalingam C
2020-11-06 5:22 ` [Intel-gfx] " Anshuman Gupta
2020-11-06 5:22 ` Anshuman Gupta
2020-11-06 7:52 ` [Intel-gfx] " Ramalingam C
2020-11-06 7:52 ` Ramalingam C
2020-10-27 16:41 ` [Intel-gfx] [PATCH v4 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-10-27 16:41 ` Anshuman Gupta
2020-11-02 7:47 ` [Intel-gfx] " Shankar, Uma
2020-11-02 7:47 ` Shankar, Uma
2020-11-05 15:41 ` [Intel-gfx] " Ramalingam C
2020-11-05 15:41 ` Ramalingam C
2020-11-06 6:36 ` [Intel-gfx] " Anshuman Gupta
2020-11-06 6:36 ` Anshuman Gupta
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-05 16:39 ` [Intel-gfx] " Ramalingam C
2020-11-05 16:39 ` Ramalingam C
2020-11-06 4:50 ` [Intel-gfx] " Anshuman Gupta
2020-11-06 4:50 ` Anshuman Gupta
2020-11-06 7:48 ` [Intel-gfx] " Ramalingam C
2020-11-06 7:48 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-06 11:34 ` [Intel-gfx] " Ramalingam C
2020-11-06 11:34 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-05 16:07 ` [Intel-gfx] " Ramalingam C
2020-11-05 16:07 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 11/16] drm/hdcp: Max MST content streams Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-05 16:09 ` Ramalingam C [this message]
2020-11-05 16:09 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 12/16] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-02 7:49 ` [Intel-gfx] " Shankar, Uma
2020-11-02 7:49 ` Shankar, Uma
2020-11-05 16:34 ` [Intel-gfx] " Ramalingam C
2020-11-05 16:34 ` Ramalingam C
2020-11-06 6:35 ` [Intel-gfx] " Anshuman Gupta
2020-11-06 6:35 ` Anshuman Gupta
2020-11-06 11:28 ` [Intel-gfx] " Ramalingam C
2020-11-06 11:28 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 13/16] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-05 16:45 ` [Intel-gfx] " Ramalingam C
2020-11-05 16:45 ` Ramalingam C
2020-11-06 5:08 ` [Intel-gfx] " Anshuman Gupta
2020-11-06 5:08 ` Anshuman Gupta
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-05 16:47 ` [Intel-gfx] " Ramalingam C
2020-11-05 16:47 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-02 7:49 ` [Intel-gfx] " Shankar, Uma
2020-11-02 7:49 ` Shankar, Uma
2020-11-03 6:27 ` [Intel-gfx] " Anshuman Gupta
2020-11-06 9:27 ` Ramalingam C
2020-11-06 11:12 ` Ramalingam C
2020-11-09 5:36 ` Anshuman Gupta
2020-11-09 8:38 ` Ramalingam C
2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-10-27 16:42 ` Anshuman Gupta
2020-11-06 11:58 ` [Intel-gfx] " Ramalingam C
2020-11-06 11:58 ` Ramalingam C
2020-10-28 2:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev2) Patchwork
2020-10-28 2:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-28 3:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-28 6:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-29 8:37 ` Anshuman Gupta
2020-10-29 22:11 ` Vudum, Lakshminarayana
2020-10-29 17:40 ` Patchwork
2020-10-29 17:54 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-11-02 9:02 ` Anshuman Gupta
2020-11-03 7:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev3) Patchwork
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