All of lore.kernel.org
 help / color / mirror / Atom feed
From: Andrew Lunn <andrew@lunn.ch>
To: Baruch Siach <baruch@tkos.co.il>
Cc: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Chris Packham" <chris.packham@alliedtelesis.co.nz>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Ralph Sennhauser" <ralph.sennhauser@gmail.com>,
	linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 0/5] gpio: mvebu: Armada 8K/7K PWM support
Date: Wed, 18 Nov 2020 23:46:32 +0100	[thread overview]
Message-ID: <20201118224632.GE1853236@lunn.ch> (raw)
In-Reply-To: <cover.1605694661.git.baruch@tkos.co.il>

On Wed, Nov 18, 2020 at 12:30:41PM +0200, Baruch Siach wrote:
> The gpio-mvebu driver supports the PWM functionality of the GPIO block for 
> earlier Armada variants like XP, 370 and 38x. This series extends support to 
> newer Armada variants that use CP11x and AP80x, like Armada 8K and 7K.
> 
> This series adds adds the 'pwm-offset' property to DT binding. 'pwm-offset' 

One adds is enough.

> points to the base of A/B counter registers that determine the PWM period and 
> duty cycle.
> 
> The existing PWM DT binding reflects an arbitrary decision to allocate the A 
> counter to the first GPIO block, and B counter to the other one.

It was not arbitrary. I decided on KISS. The few devices i've seen
using this have been for a single GPIO/PWN controlled fan. KISS was
sufficient for that, so why make it more complex?

	   Andrew

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Baruch Siach <baruch@tkos.co.il>
Cc: linux-pwm@vger.kernel.org,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Jason Cooper" <jason@lakedaemon.net>,
	linux-gpio@vger.kernel.org,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Chris Packham" <chris.packham@alliedtelesis.co.nz>,
	"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Ralph Sennhauser" <ralph.sennhauser@gmail.com>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	linux-arm-kernel@lists.infradead.org,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH 0/5] gpio: mvebu: Armada 8K/7K PWM support
Date: Wed, 18 Nov 2020 23:46:32 +0100	[thread overview]
Message-ID: <20201118224632.GE1853236@lunn.ch> (raw)
In-Reply-To: <cover.1605694661.git.baruch@tkos.co.il>

On Wed, Nov 18, 2020 at 12:30:41PM +0200, Baruch Siach wrote:
> The gpio-mvebu driver supports the PWM functionality of the GPIO block for 
> earlier Armada variants like XP, 370 and 38x. This series extends support to 
> newer Armada variants that use CP11x and AP80x, like Armada 8K and 7K.
> 
> This series adds adds the 'pwm-offset' property to DT binding. 'pwm-offset' 

One adds is enough.

> points to the base of A/B counter registers that determine the PWM period and 
> duty cycle.
> 
> The existing PWM DT binding reflects an arbitrary decision to allocate the A 
> counter to the first GPIO block, and B counter to the other one.

It was not arbitrary. I decided on KISS. The few devices i've seen
using this have been for a single GPIO/PWN controlled fan. KISS was
sufficient for that, so why make it more complex?

	   Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2020-11-18 22:46 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-18 10:30 [PATCH 0/5] gpio: mvebu: Armada 8K/7K PWM support Baruch Siach
2020-11-18 10:30 ` Baruch Siach
2020-11-18 10:30 ` [PATCH 1/5] gpio: mvebu: update Armada XP per-CPU comment Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 22:47   ` Andrew Lunn
2020-11-18 22:47     ` Andrew Lunn
2020-11-18 10:30 ` [PATCH 2/5] gpio: mvebu: switch pwm duration registers to regmap Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 22:59   ` Andrew Lunn
2020-11-18 22:59     ` Andrew Lunn
2020-11-18 10:30 ` [PATCH 3/5] gpio: mvebu: add pwm support for Armada 8K/7K Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 23:18   ` Andrew Lunn
2020-11-18 23:18     ` Andrew Lunn
2020-11-19  6:21     ` Baruch Siach
2020-11-19  6:21       ` Baruch Siach
2020-11-19 13:34       ` Andrew Lunn
2020-11-19 13:34         ` Andrew Lunn
2020-11-19 13:47         ` Baruch Siach
2020-11-19 13:47           ` Baruch Siach
2020-12-01 18:16           ` Bartosz Golaszewski
2020-12-01 18:16             ` Bartosz Golaszewski
2020-12-01 18:21             ` Baruch Siach
2020-12-01 18:21               ` Baruch Siach
2020-11-18 10:30 ` [PATCH 4/5] arm64: dts: armada: add pwm offsets for ap/cp gpios Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 10:30 ` [PATCH 5/5] dt-bindings: ap806: document gpio pwm-offset property Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 22:46 ` Andrew Lunn [this message]
2020-11-18 22:46   ` [PATCH 0/5] gpio: mvebu: Armada 8K/7K PWM support Andrew Lunn
2020-11-19  5:49   ` Baruch Siach
2020-11-19  5:49     ` Baruch Siach

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201118224632.GE1853236@lunn.ch \
    --to=andrew@lunn.ch \
    --cc=baruch@tkos.co.il \
    --cc=bgolaszewski@baylibre.com \
    --cc=chris.packham@alliedtelesis.co.nz \
    --cc=gregory.clement@bootlin.com \
    --cc=jason@lakedaemon.net \
    --cc=lee.jones@linaro.org \
    --cc=linus.walleij@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=ralph.sennhauser@gmail.com \
    --cc=s.hauer@pengutronix.de \
    --cc=sebastian.hesselbarth@gmail.com \
    --cc=thierry.reding@gmail.com \
    --cc=thomas.petazzoni@bootlin.com \
    --cc=u.kleine-koenig@pengutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.