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From: Andrew Lunn <andrew@lunn.ch>
To: Baruch Siach <baruch@tkos.co.il>
Cc: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Chris Packham" <chris.packham@alliedtelesis.co.nz>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Ralph Sennhauser" <ralph.sennhauser@gmail.com>,
	linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 3/5] gpio: mvebu: add pwm support for Armada 8K/7K
Date: Thu, 19 Nov 2020 14:34:29 +0100	[thread overview]
Message-ID: <20201119133429.GS1804098@lunn.ch> (raw)
In-Reply-To: <878sax6f43.fsf@tarshish>

> >> @@ -1200,6 +1235,13 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
> >>  
> >>  	devm_gpiochip_add_data(&pdev->dev, &mvchip->chip, mvchip);
> >>  
> >> +	/* Some MVEBU SoCs have simple PWM support for GPIO lines */
> >> +	if (IS_ENABLED(CONFIG_PWM)) {
> >> +		err = mvebu_pwm_probe(pdev, mvchip, id);
> >> +		if (err)
> >> +			return err;
> >> +	}
> >> +
> >
> > The existing error handling looks odd here. Why is there no goto
> > err_domain when probing the PWMs fails? I wonder if this a bug from me
> > from a long time again?
> 
> What would you release under the err_domain label? As far as I can see
> all resources are allocated using devres, and released automatically on
> failure exit.

The IRQ domain is still registers. So once the memory is automatically
freed, don't we have a potential use after free?

       Andrew

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Baruch Siach <baruch@tkos.co.il>
Cc: linux-pwm@vger.kernel.org,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Jason Cooper" <jason@lakedaemon.net>,
	linux-gpio@vger.kernel.org,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Chris Packham" <chris.packham@alliedtelesis.co.nz>,
	"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Ralph Sennhauser" <ralph.sennhauser@gmail.com>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	linux-arm-kernel@lists.infradead.org,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH 3/5] gpio: mvebu: add pwm support for Armada 8K/7K
Date: Thu, 19 Nov 2020 14:34:29 +0100	[thread overview]
Message-ID: <20201119133429.GS1804098@lunn.ch> (raw)
In-Reply-To: <878sax6f43.fsf@tarshish>

> >> @@ -1200,6 +1235,13 @@ static int mvebu_gpio_probe(struct platform_device *pdev)
> >>  
> >>  	devm_gpiochip_add_data(&pdev->dev, &mvchip->chip, mvchip);
> >>  
> >> +	/* Some MVEBU SoCs have simple PWM support for GPIO lines */
> >> +	if (IS_ENABLED(CONFIG_PWM)) {
> >> +		err = mvebu_pwm_probe(pdev, mvchip, id);
> >> +		if (err)
> >> +			return err;
> >> +	}
> >> +
> >
> > The existing error handling looks odd here. Why is there no goto
> > err_domain when probing the PWMs fails? I wonder if this a bug from me
> > from a long time again?
> 
> What would you release under the err_domain label? As far as I can see
> all resources are allocated using devres, and released automatically on
> failure exit.

The IRQ domain is still registers. So once the memory is automatically
freed, don't we have a potential use after free?

       Andrew

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-11-19 13:34 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-18 10:30 [PATCH 0/5] gpio: mvebu: Armada 8K/7K PWM support Baruch Siach
2020-11-18 10:30 ` Baruch Siach
2020-11-18 10:30 ` [PATCH 1/5] gpio: mvebu: update Armada XP per-CPU comment Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 22:47   ` Andrew Lunn
2020-11-18 22:47     ` Andrew Lunn
2020-11-18 10:30 ` [PATCH 2/5] gpio: mvebu: switch pwm duration registers to regmap Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 22:59   ` Andrew Lunn
2020-11-18 22:59     ` Andrew Lunn
2020-11-18 10:30 ` [PATCH 3/5] gpio: mvebu: add pwm support for Armada 8K/7K Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 23:18   ` Andrew Lunn
2020-11-18 23:18     ` Andrew Lunn
2020-11-19  6:21     ` Baruch Siach
2020-11-19  6:21       ` Baruch Siach
2020-11-19 13:34       ` Andrew Lunn [this message]
2020-11-19 13:34         ` Andrew Lunn
2020-11-19 13:47         ` Baruch Siach
2020-11-19 13:47           ` Baruch Siach
2020-12-01 18:16           ` Bartosz Golaszewski
2020-12-01 18:16             ` Bartosz Golaszewski
2020-12-01 18:21             ` Baruch Siach
2020-12-01 18:21               ` Baruch Siach
2020-11-18 10:30 ` [PATCH 4/5] arm64: dts: armada: add pwm offsets for ap/cp gpios Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 10:30 ` [PATCH 5/5] dt-bindings: ap806: document gpio pwm-offset property Baruch Siach
2020-11-18 10:30   ` Baruch Siach
2020-11-18 22:46 ` [PATCH 0/5] gpio: mvebu: Armada 8K/7K PWM support Andrew Lunn
2020-11-18 22:46   ` Andrew Lunn
2020-11-19  5:49   ` Baruch Siach
2020-11-19  5:49     ` Baruch Siach

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