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From: Sieng Piaw Liew <liew.s.piaw@gmail.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Richard Weinberger <richard@nod.at>,
	linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	liew.s.piaw@gmail.com
Subject: [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D
Date: Tue,  8 Dec 2020 09:57:30 +0800	[thread overview]
Message-ID: <20201208015730.12351-1-liew.s.piaw@gmail.com> (raw)
In-Reply-To: <20201208011938.GB12175@DESKTOP-8REGVGF.localdomain>

Enable 4-bit Block Protect support for MX256405D and its variants using
the same ID.

Tested on Innacom W3400V6 router with MX25L6406E chip.
https://github.com/openwrt/openwrt/pull/3501

Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com>
---
Changes in v2:
- Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required.

 drivers/mtd/spi-nor/macronix.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 9203abaac229..033ede381673 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = {
 	{ "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
 	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
-	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128,
+			      SECT_4K | SPI_NOR_HAS_LOCK |
+			      SPI_NOR_4BIT_BP) },
 	{ "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4, SECT_4K) },
 	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64,
 			      SECT_4K | SPI_NOR_DUAL_READ |
-- 
2.17.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Sieng Piaw Liew <liew.s.piaw@gmail.com>
To: unlisted-recipients:; (no To-header on input)
Cc: liew.s.piaw@gmail.com,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D
Date: Tue,  8 Dec 2020 09:57:30 +0800	[thread overview]
Message-ID: <20201208015730.12351-1-liew.s.piaw@gmail.com> (raw)
In-Reply-To: <20201208011938.GB12175@DESKTOP-8REGVGF.localdomain>

Enable 4-bit Block Protect support for MX256405D and its variants using
the same ID.

Tested on Innacom W3400V6 router with MX25L6406E chip.
https://github.com/openwrt/openwrt/pull/3501

Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com>
---
Changes in v2:
- Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required.

 drivers/mtd/spi-nor/macronix.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 9203abaac229..033ede381673 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = {
 	{ "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
 	{ "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
-	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+	{ "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128,
+			      SECT_4K | SPI_NOR_HAS_LOCK |
+			      SPI_NOR_4BIT_BP) },
 	{ "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4, SECT_4K) },
 	{ "mx25u3235f",	 INFO(0xc22536, 0, 64 * 1024,  64,
 			      SECT_4K | SPI_NOR_DUAL_READ |
-- 
2.17.1


  reply	other threads:[~2020-12-08  1:58 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-07  2:46 [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D Sieng Piaw Liew
2020-12-07  2:46 ` Sieng Piaw Liew
2020-12-07 17:53 ` Tudor.Ambarus
2020-12-07 17:53   ` Tudor.Ambarus
2020-12-08  1:19   ` Sieng Piaw Liew
2020-12-08  1:19     ` Sieng Piaw Liew
2020-12-08  1:57     ` Sieng Piaw Liew [this message]
2020-12-08  1:57       ` [PATCH v2] " Sieng Piaw Liew
2021-01-23 12:18       ` Tudor.Ambarus
2021-01-23 12:18         ` Tudor.Ambarus
2021-01-23 13:04         ` Michael Walle
2021-01-23 13:04           ` Michael Walle

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