From: Will Deacon <will@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Peter Zijlstra <peterz@infradead.org>,
Morten Rasmussen <morten.rasmussen@arm.com>,
Qais Yousef <qais.yousef@arm.com>,
Suren Baghdasaryan <surenb@google.com>,
Quentin Perret <qperret@google.com>, Tejun Heo <tj@kernel.org>,
Li Zefan <lizefan@huawei.com>,
Johannes Weiner <hannes@cmpxchg.org>,
Ingo Molnar <mingo@redhat.com>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
kernel-team@android.com
Subject: [PATCH v5 15/15] arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores
Date: Tue, 8 Dec 2020 13:28:35 +0000 [thread overview]
Message-ID: <20201208132835.6151-16-will@kernel.org> (raw)
In-Reply-To: <20201208132835.6151-1-will@kernel.org>
The scheduler now knows enough about these braindead systems to place
32-bit tasks accordingly, so throw out the safety checks and allow the
ret-to-user path to avoid do_notify_resume() if there is nothing to do.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kernel/process.c | 14 +-------------
arch/arm64/kernel/signal.c | 26 --------------------------
2 files changed, 1 insertion(+), 39 deletions(-)
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index da313b738c7c..3b08938c7d9d 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -541,15 +541,6 @@ static void erratum_1418040_thread_switch(struct task_struct *prev,
write_sysreg(val, cntkctl_el1);
}
-static void compat_thread_switch(struct task_struct *next)
-{
- if (!is_compat_thread(task_thread_info(next)))
- return;
-
- if (static_branch_unlikely(&arm64_mismatched_32bit_el0))
- set_tsk_thread_flag(next, TIF_NOTIFY_RESUME);
-}
-
/*
* Thread switching.
*/
@@ -566,7 +557,6 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
uao_thread_switch(next);
ssbs_thread_switch(next);
erratum_1418040_thread_switch(prev, next);
- compat_thread_switch(next);
/*
* Complete any pending TLB or cache maintenance on this CPU in case
@@ -643,10 +633,8 @@ void arch_setup_new_exec(void)
* at the point of execve(), although we try a bit harder to
* honour the cpuset hierarchy.
*/
- if (static_branch_unlikely(&arm64_mismatched_32bit_el0)) {
+ if (static_branch_unlikely(&arm64_mismatched_32bit_el0))
force_compatible_cpus_allowed_ptr(current);
- set_tsk_thread_flag(current, TIF_NOTIFY_RESUME);
- }
}
current->mm->context.flags = mmflags;
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index bcb6ca2d9a7c..a8184cad8890 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -911,19 +911,6 @@ static void do_signal(struct pt_regs *regs)
restore_saved_sigmask();
}
-static bool cpu_affinity_invalid(struct pt_regs *regs)
-{
- if (!compat_user_mode(regs))
- return false;
-
- /*
- * We're preemptible, but a reschedule will cause us to check the
- * affinity again.
- */
- return !cpumask_test_cpu(raw_smp_processor_id(),
- system_32bit_el0_cpumask());
-}
-
asmlinkage void do_notify_resume(struct pt_regs *regs,
unsigned long thread_flags)
{
@@ -961,19 +948,6 @@ asmlinkage void do_notify_resume(struct pt_regs *regs,
if (thread_flags & _TIF_NOTIFY_RESUME) {
tracehook_notify_resume(regs);
rseq_handle_notify_resume(NULL, regs);
-
- /*
- * If we reschedule after checking the affinity
- * then we must ensure that TIF_NOTIFY_RESUME
- * is set so that we check the affinity again.
- * Since tracehook_notify_resume() clears the
- * flag, ensure that the compiler doesn't move
- * it after the affinity check.
- */
- barrier();
-
- if (cpu_affinity_invalid(regs))
- force_sig(SIGKILL);
}
if (thread_flags & _TIF_FOREIGN_FPSTATE)
--
2.29.2.576.ga3fc446d84-goog
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-arch@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
kernel-team@android.com,
Vincent Guittot <vincent.guittot@linaro.org>,
Juri Lelli <juri.lelli@redhat.com>,
Quentin Perret <qperret@google.com>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Johannes Weiner <hannes@cmpxchg.org>,
linux-kernel@vger.kernel.org, Qais Yousef <qais.yousef@arm.com>,
Suren Baghdasaryan <surenb@google.com>,
Ingo Molnar <mingo@redhat.com>, Li Zefan <lizefan@huawei.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Tejun Heo <tj@kernel.org>, Will Deacon <will@kernel.org>,
Morten Rasmussen <morten.rasmussen@arm.com>
Subject: [PATCH v5 15/15] arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores
Date: Tue, 8 Dec 2020 13:28:35 +0000 [thread overview]
Message-ID: <20201208132835.6151-16-will@kernel.org> (raw)
In-Reply-To: <20201208132835.6151-1-will@kernel.org>
The scheduler now knows enough about these braindead systems to place
32-bit tasks accordingly, so throw out the safety checks and allow the
ret-to-user path to avoid do_notify_resume() if there is nothing to do.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kernel/process.c | 14 +-------------
arch/arm64/kernel/signal.c | 26 --------------------------
2 files changed, 1 insertion(+), 39 deletions(-)
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index da313b738c7c..3b08938c7d9d 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -541,15 +541,6 @@ static void erratum_1418040_thread_switch(struct task_struct *prev,
write_sysreg(val, cntkctl_el1);
}
-static void compat_thread_switch(struct task_struct *next)
-{
- if (!is_compat_thread(task_thread_info(next)))
- return;
-
- if (static_branch_unlikely(&arm64_mismatched_32bit_el0))
- set_tsk_thread_flag(next, TIF_NOTIFY_RESUME);
-}
-
/*
* Thread switching.
*/
@@ -566,7 +557,6 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
uao_thread_switch(next);
ssbs_thread_switch(next);
erratum_1418040_thread_switch(prev, next);
- compat_thread_switch(next);
/*
* Complete any pending TLB or cache maintenance on this CPU in case
@@ -643,10 +633,8 @@ void arch_setup_new_exec(void)
* at the point of execve(), although we try a bit harder to
* honour the cpuset hierarchy.
*/
- if (static_branch_unlikely(&arm64_mismatched_32bit_el0)) {
+ if (static_branch_unlikely(&arm64_mismatched_32bit_el0))
force_compatible_cpus_allowed_ptr(current);
- set_tsk_thread_flag(current, TIF_NOTIFY_RESUME);
- }
}
current->mm->context.flags = mmflags;
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index bcb6ca2d9a7c..a8184cad8890 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -911,19 +911,6 @@ static void do_signal(struct pt_regs *regs)
restore_saved_sigmask();
}
-static bool cpu_affinity_invalid(struct pt_regs *regs)
-{
- if (!compat_user_mode(regs))
- return false;
-
- /*
- * We're preemptible, but a reschedule will cause us to check the
- * affinity again.
- */
- return !cpumask_test_cpu(raw_smp_processor_id(),
- system_32bit_el0_cpumask());
-}
-
asmlinkage void do_notify_resume(struct pt_regs *regs,
unsigned long thread_flags)
{
@@ -961,19 +948,6 @@ asmlinkage void do_notify_resume(struct pt_regs *regs,
if (thread_flags & _TIF_NOTIFY_RESUME) {
tracehook_notify_resume(regs);
rseq_handle_notify_resume(NULL, regs);
-
- /*
- * If we reschedule after checking the affinity
- * then we must ensure that TIF_NOTIFY_RESUME
- * is set so that we check the affinity again.
- * Since tracehook_notify_resume() clears the
- * flag, ensure that the compiler doesn't move
- * it after the affinity check.
- */
- barrier();
-
- if (cpu_affinity_invalid(regs))
- force_sig(SIGKILL);
}
if (thread_flags & _TIF_FOREIGN_FPSTATE)
--
2.29.2.576.ga3fc446d84-goog
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next prev parent reply other threads:[~2020-12-08 13:30 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 13:28 [PATCH v5 00/15] An alternative series for asymmetric AArch32 systems Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 01/15] arm64: cpuinfo: Split AArch32 registers out into a separate struct Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 02/15] arm64: Allow mismatched 32-bit EL0 support Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 03/15] KVM: arm64: Kill 32-bit vCPUs on systems with mismatched " Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 04/15] arm64: Kill 32-bit applications scheduled on 64-bit-only CPUs Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 05/15] arm64: Advertise CPUs capable of running 32-bit applications in sysfs Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 06/15] sched: Introduce task_cpu_possible_mask() to limit fallback rq selection Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 07/15] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1 Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-17 12:15 ` Qais Yousef
2020-12-17 12:15 ` Qais Yousef
2020-12-17 13:44 ` Peter Zijlstra
2020-12-17 13:44 ` Peter Zijlstra
2020-12-17 14:59 ` Will Deacon
2020-12-17 14:59 ` Will Deacon
2020-12-17 15:00 ` Qais Yousef
2020-12-17 15:00 ` Qais Yousef
2020-12-08 13:28 ` [PATCH v5 08/15] cpuset: Honour task_cpu_possible_mask() in guarantee_online_cpus() Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-28 3:54 ` Suren Baghdasaryan
2020-12-28 3:54 ` Suren Baghdasaryan
2020-12-08 13:28 ` [PATCH v5 09/15] sched: Reject CPU affinity changes based on task_cpu_possible_mask() Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 10/15] sched: Introduce force_compatible_cpus_allowed_ptr() to limit CPU affinity Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-28 4:29 ` Suren Baghdasaryan
2020-12-28 4:29 ` Suren Baghdasaryan
2020-12-08 13:28 ` [PATCH v5 11/15] arm64: Implement task_cpu_possible_mask() Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 12/15] arm64: exec: Adjust affinity for compat tasks with mismatched 32-bit EL0 Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 13/15] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` [PATCH v5 14/15] arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0 Will Deacon
2020-12-08 13:28 ` Will Deacon
2020-12-08 13:28 ` Will Deacon [this message]
2020-12-08 13:28 ` [PATCH v5 15/15] arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores Will Deacon
2020-12-15 17:36 ` [PATCH v5 00/15] An alternative series for asymmetric AArch32 systems Peter Zijlstra
2020-12-15 17:36 ` Peter Zijlstra
2020-12-15 18:50 ` Will Deacon
2020-12-15 18:50 ` Will Deacon
2020-12-17 10:55 ` Peter Zijlstra
2020-12-17 10:55 ` Peter Zijlstra
2020-12-16 11:16 ` Qais Yousef
2020-12-16 11:16 ` Qais Yousef
2020-12-16 14:14 ` Will Deacon
2020-12-16 14:14 ` Will Deacon
2020-12-16 16:48 ` Qais Yousef
2020-12-16 16:48 ` Qais Yousef
2020-12-16 18:21 ` Suren Baghdasaryan
2020-12-16 18:21 ` Suren Baghdasaryan
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