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From: Shawn Guo <shawnguo@kernel.org>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>,
	Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Philippe Schenker <philippe.schenker@toradex.com>,
	kernel@pengutronix.de, netdev@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-imx@nxp.com,
	Fabio Estevam <festevam@gmail.com>,
	David Jander <david@protonic.nl>,
	Russell King <linux@armlinux.org.uk>
Subject: Re: [PATCH v2 1/7] ARM: imx6q: remove PHY fixup for KSZ9031
Date: Tue, 11 May 2021 09:49:41 +0800	[thread overview]
Message-ID: <20210511014937.GK27585@dragon> (raw)
In-Reply-To: <20210309112615.625-2-o.rempel@pengutronix.de>

On Tue, Mar 09, 2021 at 12:26:09PM +0100, Oleksij Rempel wrote:
> Starting with:
> 
>     bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
> 
> the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
> At least with kernel v5.8 configuration provided by this fixup was
> overwritten by the micrel driver.
> 
> This fixup was providing following configuration:
> 
> RX path: 2.58ns delay
>     rx -0.42 (left shift) + rx_clk  +0.96ns (right shift) =
>         1,38 + 1,2 internal RX delay = 2.58ns
> TX path: 0.96ns delay
>     tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
> 
> This configuration is outside of the recommended RGMII clock skew delays
> and about in the middle of: rgmii-idrx and rgmii-id
> 
> Since most embedded systems do not have enough place to introduce
> significant clock skew, rgmii-id is the way to go.
> 
> In case this patch breaks network functionality on your system, build
> kernel with enabled MICREL_PHY. If it is still not working then try
> following device tree options:
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-id";
>    This actives internal delay for both RX and TX.
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-idrx";
>    This actives internal delay for RX only.
> 3. Use following DT properties:
>    phy-mode = "rgmii";
>    txen-skew-psec = <0>;
>    rxdv-skew-psec = <0>;
>    rxd0-skew-psec = <0>;
>    rxd1-skew-psec = <0>;
>    rxd2-skew-psec = <0>;
>    rxd3-skew-psec = <0>;
>    rxc-skew-psec = <1860>;
>    txc-skew-psec = <1860>;
>    This activates the internal delays for RX and TX, with the value as
>    the fixup that is removed in this patch.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> Acked-by: Philippe Schenker <philippe.schenker@toradex.com>
> ---
>  arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts |  2 +-
>  arch/arm/mach-imx/mach-imx6q.c          | 23 -----------------------

I have different branch for DTS and mach-imx change.  Please split the
changes.

Shawn

>  2 files changed, 1 insertion(+), 24 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> index fa2307d8ce86..c713ac03b3b9 100644
> --- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> +++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> @@ -112,7 +112,7 @@ flash: m25p80@0 {
>  &fec {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_enet>;
> -	phy-mode = "rgmii";
> +	phy-mode = "rgmii-id";
>  	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
>  	phy-supply = <&vgen2_1v2_eth>;
>  	status = "okay";
> diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
> index 703998ebb52e..78205f90da27 100644
> --- a/arch/arm/mach-imx/mach-imx6q.c
> +++ b/arch/arm/mach-imx/mach-imx6q.c
> @@ -40,27 +40,6 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev)
>  	return 0;
>  }
>  
> -static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
> -{
> -	phy_write(dev, 0x0d, device);
> -	phy_write(dev, 0x0e, reg);
> -	phy_write(dev, 0x0d, (1 << 14) | device);
> -	phy_write(dev, 0x0e, val);
> -}
> -
> -static int ksz9031rn_phy_fixup(struct phy_device *dev)
> -{
> -	/*
> -	 * min rx data delay, max rx/tx clock delay,
> -	 * min rx/tx control delay
> -	 */
> -	mmd_write_reg(dev, 2, 4, 0);
> -	mmd_write_reg(dev, 2, 5, 0);
> -	mmd_write_reg(dev, 2, 8, 0x003ff);
> -
> -	return 0;
> -}
> -
>  /*
>   * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
>   * as they are used for slots1-7 PERST#
> @@ -152,8 +131,6 @@ static void __init imx6q_enet_phy_init(void)
>  	if (IS_BUILTIN(CONFIG_PHYLIB)) {
>  		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
>  				ksz9021rn_phy_fixup);
> -		phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
> -				ksz9031rn_phy_fixup);
>  		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef,
>  				ar8031_phy_fixup);
>  		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
> -- 
> 2.29.2
> 

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WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>,
	Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Philippe Schenker <philippe.schenker@toradex.com>,
	kernel@pengutronix.de, netdev@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-imx@nxp.com,
	Fabio Estevam <festevam@gmail.com>,
	David Jander <david@protonic.nl>,
	Russell King <linux@armlinux.org.uk>
Subject: Re: [PATCH v2 1/7] ARM: imx6q: remove PHY fixup for KSZ9031
Date: Tue, 11 May 2021 09:49:41 +0800	[thread overview]
Message-ID: <20210511014937.GK27585@dragon> (raw)
In-Reply-To: <20210309112615.625-2-o.rempel@pengutronix.de>

On Tue, Mar 09, 2021 at 12:26:09PM +0100, Oleksij Rempel wrote:
> Starting with:
> 
>     bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
> 
> the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
> At least with kernel v5.8 configuration provided by this fixup was
> overwritten by the micrel driver.
> 
> This fixup was providing following configuration:
> 
> RX path: 2.58ns delay
>     rx -0.42 (left shift) + rx_clk  +0.96ns (right shift) =
>         1,38 + 1,2 internal RX delay = 2.58ns
> TX path: 0.96ns delay
>     tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
> 
> This configuration is outside of the recommended RGMII clock skew delays
> and about in the middle of: rgmii-idrx and rgmii-id
> 
> Since most embedded systems do not have enough place to introduce
> significant clock skew, rgmii-id is the way to go.
> 
> In case this patch breaks network functionality on your system, build
> kernel with enabled MICREL_PHY. If it is still not working then try
> following device tree options:
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-id";
>    This actives internal delay for both RX and TX.
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-idrx";
>    This actives internal delay for RX only.
> 3. Use following DT properties:
>    phy-mode = "rgmii";
>    txen-skew-psec = <0>;
>    rxdv-skew-psec = <0>;
>    rxd0-skew-psec = <0>;
>    rxd1-skew-psec = <0>;
>    rxd2-skew-psec = <0>;
>    rxd3-skew-psec = <0>;
>    rxc-skew-psec = <1860>;
>    txc-skew-psec = <1860>;
>    This activates the internal delays for RX and TX, with the value as
>    the fixup that is removed in this patch.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
> Acked-by: Philippe Schenker <philippe.schenker@toradex.com>
> ---
>  arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts |  2 +-
>  arch/arm/mach-imx/mach-imx6q.c          | 23 -----------------------

I have different branch for DTS and mach-imx change.  Please split the
changes.

Shawn

>  2 files changed, 1 insertion(+), 24 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> index fa2307d8ce86..c713ac03b3b9 100644
> --- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> +++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
> @@ -112,7 +112,7 @@ flash: m25p80@0 {
>  &fec {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_enet>;
> -	phy-mode = "rgmii";
> +	phy-mode = "rgmii-id";
>  	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
>  	phy-supply = <&vgen2_1v2_eth>;
>  	status = "okay";
> diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
> index 703998ebb52e..78205f90da27 100644
> --- a/arch/arm/mach-imx/mach-imx6q.c
> +++ b/arch/arm/mach-imx/mach-imx6q.c
> @@ -40,27 +40,6 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev)
>  	return 0;
>  }
>  
> -static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
> -{
> -	phy_write(dev, 0x0d, device);
> -	phy_write(dev, 0x0e, reg);
> -	phy_write(dev, 0x0d, (1 << 14) | device);
> -	phy_write(dev, 0x0e, val);
> -}
> -
> -static int ksz9031rn_phy_fixup(struct phy_device *dev)
> -{
> -	/*
> -	 * min rx data delay, max rx/tx clock delay,
> -	 * min rx/tx control delay
> -	 */
> -	mmd_write_reg(dev, 2, 4, 0);
> -	mmd_write_reg(dev, 2, 5, 0);
> -	mmd_write_reg(dev, 2, 8, 0x003ff);
> -
> -	return 0;
> -}
> -
>  /*
>   * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
>   * as they are used for slots1-7 PERST#
> @@ -152,8 +131,6 @@ static void __init imx6q_enet_phy_init(void)
>  	if (IS_BUILTIN(CONFIG_PHYLIB)) {
>  		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
>  				ksz9021rn_phy_fixup);
> -		phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
> -				ksz9031rn_phy_fixup);
>  		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef,
>  				ar8031_phy_fixup);
>  		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
> -- 
> 2.29.2
> 

  reply	other threads:[~2021-05-11 11:11 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-09 11:26 [PATCH v2 0/7] remove different PHY fixups Oleksij Rempel
2021-03-09 11:26 ` Oleksij Rempel
2021-03-09 11:26 ` [PATCH v2 1/7] ARM: imx6q: remove PHY fixup for KSZ9031 Oleksij Rempel
2021-03-09 11:26   ` Oleksij Rempel
2021-05-11  1:49   ` Shawn Guo [this message]
2021-05-11  1:49     ` Shawn Guo
2021-03-09 11:26 ` [PATCH v2 2/7] ARM: imx6q: remove TX clock delay of ar8031_phy_fixup() Oleksij Rempel
2021-03-09 11:26   ` Oleksij Rempel
2021-03-09 11:26 ` [PATCH v2 3/7] ARM: imx6q: remove hand crafted PHY power up in ar8035_phy_fixup() Oleksij Rempel
2021-03-09 11:26   ` Oleksij Rempel
2021-03-09 11:26 ` [PATCH v2 4/7] ARM: imx6q: remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs Oleksij Rempel
2021-03-09 11:26   ` Oleksij Rempel
2021-03-09 11:26 ` [PATCH v2 5/7] ARM: imx6q: remove Atheros AR8035 SmartEEE fixup Oleksij Rempel
2021-03-09 11:26   ` Oleksij Rempel
2021-03-09 11:26 ` [PATCH v2 6/7] ARM: imx6sx: remove Atheros AR8031 PHY fixup Oleksij Rempel
2021-03-09 11:26   ` Oleksij Rempel
2021-03-09 11:26 ` [PATCH v2 7/7] ARM: imx7d: " Oleksij Rempel
2021-03-09 11:26   ` Oleksij Rempel
2021-03-24  5:54 ` [PATCH v2 0/7] remove different PHY fixups Oleksij Rempel
2021-03-24  5:54   ` Oleksij Rempel
2021-03-29  0:44   ` Shawn Guo
2021-03-29  0:44     ` Shawn Guo
2021-03-29  8:13     ` Oleksij Rempel
2021-03-29  8:13       ` Oleksij Rempel
2021-03-30 14:00 ` Fabio Estevam
2021-03-30 14:00   ` Fabio Estevam
2021-03-30 14:30   ` Andrew Lunn
2021-03-30 14:30     ` Andrew Lunn
2021-03-30 15:04     ` Fabio Estevam
2021-03-30 15:04       ` Fabio Estevam
2021-04-13  9:43       ` Oleksij Rempel
2021-04-13  9:43         ` Oleksij Rempel
2021-04-13 10:00 ` Lucas Stach
2021-04-13 10:00   ` Lucas Stach
2021-04-13 10:51   ` Russell King - ARM Linux admin
2021-04-13 10:51     ` Russell King - ARM Linux admin
2021-04-13 11:10     ` Lucas Stach
2021-04-13 11:10       ` Lucas Stach

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