All of lore.kernel.org
 help / color / mirror / Atom feed
From: Shawn Guo <shawnguo@kernel.org>
To: Kornel Duleba <mindal@semihalf.com>,
	Claudiu Manoil <claudiu.manoil@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, leoyang.li@nxp.com,
	robh+dt@kernel.org, mw@semihalf.com, tn@semihalf.com,
	upstream@semihalf.com
Subject: Re: [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window ranges
Date: Tue, 11 May 2021 11:06:59 +0800	[thread overview]
Message-ID: <20210511030658.GG3425@dragon> (raw)
In-Reply-To: <20210407123438.224551-1-mindal@semihalf.com>

+ Claudiu

On Wed, Apr 07, 2021 at 02:34:38PM +0200, Kornel Duleba wrote:
> Currently all PCIE windows point to bus address 0x0, which does not match
> the values obtained from hardware during EA.
> Replace those values with CPU addresses, since in reality we
> have a 1:1 mapping between the two.
> 
> Signed-off-by: Kornel Duleba <mindal@semihalf.com>

Claudiu,

Do you have any comment on this?

Shawn

> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 262fbad8f0ec..85c62a6fabb6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -994,19 +994,19 @@ pcie@1f0000000 { /* Integrated Endpoint Root Complex */
>  			msi-map = <0 &its 0x17 0xe>;
>  			iommu-map = <0 &smmu 0x17 0xe>;
>  				  /* PF0-6 BAR0 - non-prefetchable memory */
> -			ranges = <0x82000000 0x0 0x00000000  0x1 0xf8000000  0x0 0x160000
> +			ranges = <0x82000000 0x1 0xf8000000  0x1 0xf8000000  0x0 0x160000
>  				  /* PF0-6 BAR2 - prefetchable memory */
> -				  0xc2000000 0x0 0x00000000  0x1 0xf8160000  0x0 0x070000
> +				  0xc2000000 0x1 0xf8160000  0x1 0xf8160000  0x0 0x070000
>  				  /* PF0: VF0-1 BAR0 - non-prefetchable memory */
> -				  0x82000000 0x0 0x00000000  0x1 0xf81d0000  0x0 0x020000
> +				  0x82000000 0x1 0xf81d0000  0x1 0xf81d0000  0x0 0x020000
>  				  /* PF0: VF0-1 BAR2 - prefetchable memory */
> -				  0xc2000000 0x0 0x00000000  0x1 0xf81f0000  0x0 0x020000
> +				  0xc2000000 0x1 0xf81f0000  0x1 0xf81f0000  0x0 0x020000
>  				  /* PF1: VF0-1 BAR0 - non-prefetchable memory */
> -				  0x82000000 0x0 0x00000000  0x1 0xf8210000  0x0 0x020000
> +				  0x82000000 0x1 0xf8210000  0x1 0xf8210000  0x0 0x020000
>  				  /* PF1: VF0-1 BAR2 - prefetchable memory */
> -				  0xc2000000 0x0 0x00000000  0x1 0xf8230000  0x0 0x020000
> +				  0xc2000000 0x1 0xf8230000  0x1 0xf8230000  0x0 0x020000
>  				  /* BAR4 (PF5) - non-prefetchable memory */
> -				  0x82000000 0x0 0x00000000  0x1 0xfc000000  0x0 0x400000>;
> +				  0x82000000 0x1 0xfc000000  0x1 0xfc000000  0x0 0x400000>;
>  
>  			enetc_port0: ethernet@0,0 {
>  				compatible = "fsl,enetc";
> -- 
> 2.31.1
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Kornel Duleba <mindal@semihalf.com>,
	Claudiu Manoil <claudiu.manoil@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, leoyang.li@nxp.com,
	robh+dt@kernel.org, mw@semihalf.com, tn@semihalf.com,
	upstream@semihalf.com
Subject: Re: [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window ranges
Date: Tue, 11 May 2021 11:06:59 +0800	[thread overview]
Message-ID: <20210511030658.GG3425@dragon> (raw)
In-Reply-To: <20210407123438.224551-1-mindal@semihalf.com>

+ Claudiu

On Wed, Apr 07, 2021 at 02:34:38PM +0200, Kornel Duleba wrote:
> Currently all PCIE windows point to bus address 0x0, which does not match
> the values obtained from hardware during EA.
> Replace those values with CPU addresses, since in reality we
> have a 1:1 mapping between the two.
> 
> Signed-off-by: Kornel Duleba <mindal@semihalf.com>

Claudiu,

Do you have any comment on this?

Shawn

> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 262fbad8f0ec..85c62a6fabb6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -994,19 +994,19 @@ pcie@1f0000000 { /* Integrated Endpoint Root Complex */
>  			msi-map = <0 &its 0x17 0xe>;
>  			iommu-map = <0 &smmu 0x17 0xe>;
>  				  /* PF0-6 BAR0 - non-prefetchable memory */
> -			ranges = <0x82000000 0x0 0x00000000  0x1 0xf8000000  0x0 0x160000
> +			ranges = <0x82000000 0x1 0xf8000000  0x1 0xf8000000  0x0 0x160000
>  				  /* PF0-6 BAR2 - prefetchable memory */
> -				  0xc2000000 0x0 0x00000000  0x1 0xf8160000  0x0 0x070000
> +				  0xc2000000 0x1 0xf8160000  0x1 0xf8160000  0x0 0x070000
>  				  /* PF0: VF0-1 BAR0 - non-prefetchable memory */
> -				  0x82000000 0x0 0x00000000  0x1 0xf81d0000  0x0 0x020000
> +				  0x82000000 0x1 0xf81d0000  0x1 0xf81d0000  0x0 0x020000
>  				  /* PF0: VF0-1 BAR2 - prefetchable memory */
> -				  0xc2000000 0x0 0x00000000  0x1 0xf81f0000  0x0 0x020000
> +				  0xc2000000 0x1 0xf81f0000  0x1 0xf81f0000  0x0 0x020000
>  				  /* PF1: VF0-1 BAR0 - non-prefetchable memory */
> -				  0x82000000 0x0 0x00000000  0x1 0xf8210000  0x0 0x020000
> +				  0x82000000 0x1 0xf8210000  0x1 0xf8210000  0x0 0x020000
>  				  /* PF1: VF0-1 BAR2 - prefetchable memory */
> -				  0xc2000000 0x0 0x00000000  0x1 0xf8230000  0x0 0x020000
> +				  0xc2000000 0x1 0xf8230000  0x1 0xf8230000  0x0 0x020000
>  				  /* BAR4 (PF5) - non-prefetchable memory */
> -				  0x82000000 0x0 0x00000000  0x1 0xfc000000  0x0 0x400000>;
> +				  0x82000000 0x1 0xfc000000  0x1 0xfc000000  0x0 0x400000>;
>  
>  			enetc_port0: ethernet@0,0 {
>  				compatible = "fsl,enetc";
> -- 
> 2.31.1
> 

  parent reply	other threads:[~2021-05-11 10:16 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-07 12:34 [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window ranges Kornel Duleba
2021-04-07 12:34 ` Kornel Duleba
2021-04-16 11:36 ` Kornel Dulęba
2021-04-16 11:36   ` Kornel Dulęba
2021-05-11  3:06 ` Shawn Guo [this message]
2021-05-11  3:06   ` Shawn Guo
2021-05-11  9:48   ` Claudiu Manoil
2021-05-11  9:48     ` Claudiu Manoil
2021-05-13  2:12     ` Shawn Guo
2021-05-13  2:12       ` Shawn Guo
2021-05-13 14:19       ` Vladimir Oltean
2021-05-13 14:19         ` Vladimir Oltean
2021-05-13 17:54         ` Marcin Wojtas
2021-05-13 17:54           ` Marcin Wojtas
2021-05-13 18:31           ` Vladimir Oltean
2021-05-13 18:31             ` Vladimir Oltean
2021-05-14  8:25             ` Kornel Dulęba
2021-05-14  8:25               ` Kornel Dulęba
2021-05-19 14:28               ` Kornel Dulęba
2021-05-19 14:28                 ` Kornel Dulęba
2021-05-22 12:27 ` Shawn Guo
2021-05-22 12:27   ` Shawn Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210511030658.GG3425@dragon \
    --to=shawnguo@kernel.org \
    --cc=claudiu.manoil@nxp.com \
    --cc=devicetree@vger.kernel.org \
    --cc=leoyang.li@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mindal@semihalf.com \
    --cc=mw@semihalf.com \
    --cc=robh+dt@kernel.org \
    --cc=tn@semihalf.com \
    --cc=upstream@semihalf.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.