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From: Shawn Guo <shawnguo@kernel.org>
To: Claudiu Manoil <claudiu.manoil@nxp.com>
Cc: Kornel Duleba <mindal@semihalf.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	 "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mw@semihalf.com" <mw@semihalf.com>,
	"tn@semihalf.com" <tn@semihalf.com>,
	"upstream@semihalf.com" <upstream@semihalf.com>,
	Vladimir Oltean <vladimir.oltean@nxp.com>,
	Alexandru Marginean <alexandru.marginean@nxp.com>
Subject: Re: [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window ranges
Date: Thu, 13 May 2021 10:12:15 +0800	[thread overview]
Message-ID: <20210513021214.GJ3425@dragon> (raw)
In-Reply-To: <AM0PR04MB67542D30A9424D455DB3ADD496539@AM0PR04MB6754.eurprd04.prod.outlook.com>

On Tue, May 11, 2021 at 09:48:22AM +0000, Claudiu Manoil wrote:
> >-----Original Message-----
> >From: Shawn Guo <shawnguo@kernel.org>
> >Sent: Tuesday, May 11, 2021 6:07 AM
> [...]
> >Subject: Re: [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window
> >ranges
> >
> >+ Claudiu
> >
> >On Wed, Apr 07, 2021 at 02:34:38PM +0200, Kornel Duleba wrote:
> >> Currently all PCIE windows point to bus address 0x0, which does not match
> >> the values obtained from hardware during EA.
> >> Replace those values with CPU addresses, since in reality we
> >> have a 1:1 mapping between the two.
> >>
> >> Signed-off-by: Kornel Duleba <mindal@semihalf.com>
> >
> >Claudiu,
> >
> >Do you have any comment on this?
> >
> 
> Well, probing is still working with this change, I've just tested it.
> 
> PCI listing at boot time changes from:
> 
> pci-host-generic 1f0000000.pcie: host bridge /soc/pcie@1f0000000 ranges:
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8000000..0x01f815ffff -> 0x0000000000
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8160000..0x01f81cffff -> 0x0000000000
> 
> to:
> 
> pci-host-generic 1f0000000.pcie: host bridge /soc/pcie@1f0000000 ranges:
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8000000..0x01f815ffff -> 0x01f8000000
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8160000..0x01f81cffff -> 0x01f8160000
> 
> and looks reasonable.
> Adding Vladimir and Alex just in case.
> 
> Acked-by: Claudiu Manoil <claudiu.manoil@nxp.com>

Thanks, Claudiu.

Kornel,

Do we need a Fixes tag for this patch?

Shawn

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WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Claudiu Manoil <claudiu.manoil@nxp.com>
Cc: Kornel Duleba <mindal@semihalf.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mw@semihalf.com" <mw@semihalf.com>,
	"tn@semihalf.com" <tn@semihalf.com>,
	"upstream@semihalf.com" <upstream@semihalf.com>,
	Vladimir Oltean <vladimir.oltean@nxp.com>,
	Alexandru Marginean <alexandru.marginean@nxp.com>
Subject: Re: [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window ranges
Date: Thu, 13 May 2021 10:12:15 +0800	[thread overview]
Message-ID: <20210513021214.GJ3425@dragon> (raw)
In-Reply-To: <AM0PR04MB67542D30A9424D455DB3ADD496539@AM0PR04MB6754.eurprd04.prod.outlook.com>

On Tue, May 11, 2021 at 09:48:22AM +0000, Claudiu Manoil wrote:
> >-----Original Message-----
> >From: Shawn Guo <shawnguo@kernel.org>
> >Sent: Tuesday, May 11, 2021 6:07 AM
> [...]
> >Subject: Re: [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window
> >ranges
> >
> >+ Claudiu
> >
> >On Wed, Apr 07, 2021 at 02:34:38PM +0200, Kornel Duleba wrote:
> >> Currently all PCIE windows point to bus address 0x0, which does not match
> >> the values obtained from hardware during EA.
> >> Replace those values with CPU addresses, since in reality we
> >> have a 1:1 mapping between the two.
> >>
> >> Signed-off-by: Kornel Duleba <mindal@semihalf.com>
> >
> >Claudiu,
> >
> >Do you have any comment on this?
> >
> 
> Well, probing is still working with this change, I've just tested it.
> 
> PCI listing at boot time changes from:
> 
> pci-host-generic 1f0000000.pcie: host bridge /soc/pcie@1f0000000 ranges:
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8000000..0x01f815ffff -> 0x0000000000
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8160000..0x01f81cffff -> 0x0000000000
> 
> to:
> 
> pci-host-generic 1f0000000.pcie: host bridge /soc/pcie@1f0000000 ranges:
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8000000..0x01f815ffff -> 0x01f8000000
> pci-host-generic 1f0000000.pcie:      MEM 0x01f8160000..0x01f81cffff -> 0x01f8160000
> 
> and looks reasonable.
> Adding Vladimir and Alex just in case.
> 
> Acked-by: Claudiu Manoil <claudiu.manoil@nxp.com>

Thanks, Claudiu.

Kornel,

Do we need a Fixes tag for this patch?

Shawn

  reply	other threads:[~2021-05-13  2:14 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-07 12:34 [PATCH] arm64: dts: fsl-ls1028a: Correct ECAM PCIE window ranges Kornel Duleba
2021-04-07 12:34 ` Kornel Duleba
2021-04-16 11:36 ` Kornel Dulęba
2021-04-16 11:36   ` Kornel Dulęba
2021-05-11  3:06 ` Shawn Guo
2021-05-11  3:06   ` Shawn Guo
2021-05-11  9:48   ` Claudiu Manoil
2021-05-11  9:48     ` Claudiu Manoil
2021-05-13  2:12     ` Shawn Guo [this message]
2021-05-13  2:12       ` Shawn Guo
2021-05-13 14:19       ` Vladimir Oltean
2021-05-13 14:19         ` Vladimir Oltean
2021-05-13 17:54         ` Marcin Wojtas
2021-05-13 17:54           ` Marcin Wojtas
2021-05-13 18:31           ` Vladimir Oltean
2021-05-13 18:31             ` Vladimir Oltean
2021-05-14  8:25             ` Kornel Dulęba
2021-05-14  8:25               ` Kornel Dulęba
2021-05-19 14:28               ` Kornel Dulęba
2021-05-19 14:28                 ` Kornel Dulęba
2021-05-22 12:27 ` Shawn Guo
2021-05-22 12:27   ` Shawn Guo

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