From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH i-g-t 2/8] tools/intel_watermark: Use WM_SR_CNT to observe SR residency
Date: Fri, 14 May 2021 12:36:49 +0300 [thread overview]
Message-ID: <20210514093649.GB8606@intel.com> (raw)
In-Reply-To: <20210414022754.31710-3-ville.syrjala@linux.intel.com>
On Wed, Apr 14, 2021 at 05:27:48AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> WM_SR_CNT (exists since HSW) has some kind of SR residency counter,
> which is nice for checking whether the watermarks work decently.
> Let's use it.
As I understood this is just somekind of a counter which indicates,
how long we kept memory awake.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@gmail.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> tools/intel_watermark.c | 53 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index bc2a46232772..39aaf9fbe055 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -35,6 +35,7 @@
>
> static uint32_t display_base;
> static uint32_t devid;
> +static unsigned int sr_sleep;
>
> static uint32_t read_reg(uint32_t addr)
> {
> @@ -240,6 +241,22 @@ static const char *skl_nv12_buf_cfg_reg_name(int pipe, int plane)
> return reg_name;
> }
>
> +static void hsw_wm_sr_cnt(void)
> +{
> + if (sr_sleep) {
> + uint32_t pre, post;
> +
> + pre = read_reg(0x45264);
> + sleep(sr_sleep);
> + post = read_reg(0x45264);
> +
> + printf("WM_SR_CNT: 0x%08x->0x%08x\n", pre, post);
> + printf("SR residency: %u%%\n", ((post - pre) * 8 / (sr_sleep * 10000)));
> + } else {
> + printf("WM_SR_CNT: 0x%08x\n", read_reg(0x45264));
> + }
> +}
> +
> static void skl_wm_dump(void)
> {
> struct intel_mmio_data mmio_data;
> @@ -462,6 +479,8 @@ static void skl_wm_dump(void)
> printf("* plane watermark enabled\n");
> printf("(x) line watermark if enabled\n");
>
> + hsw_wm_sr_cnt();
> +
> wm_dbg = read_reg(0x45280);
> printf("WM_DBG: 0x%08x\n", wm_dbg);
> printf(" LP used:");
> @@ -627,7 +646,11 @@ static void ilk_wm_dump(void)
> endis(!REG_DECODE1(arb_ctl, 15, 1)));
>
> if (IS_BROADWELL(devid) || IS_HASWELL(devid)) {
> - uint32_t wm_dbg = read_reg(0x45280);
> + uint32_t wm_dbg;
> +
> + hsw_wm_sr_cnt();
> +
> + wm_dbg = read_reg(0x45280);
> printf("WM_DBG: 0x%08x\n", wm_dbg);
> if (wm_dbg & (1 << 31))
> printf(" Full maxfifo used\n");
> @@ -1265,10 +1288,38 @@ static void gen2_wm_dump(void)
> }
> }
>
> +static void __attribute__((noreturn)) usage(const char *name)
> +{
> + fprintf(stderr, "Usage: %s [options]\n"
> + " -s,--sr-sleep <seconds>\n",
> + name);
> + exit(1);
> +}
> +
> int main(int argc, char *argv[])
> {
> devid = intel_get_pci_device()->device_id;
>
> + for (;;) {
> + static const struct option long_options[] = {
> + { .name = "sr-sleep", .has_arg = required_argument, },
> + {}
> + };
> +
> + int opt = getopt_long(argc, argv, "s:", long_options, NULL);
> + if (opt == -1)
> + break;
> +
> + switch (opt) {
> + case 's':
> + sr_sleep = atoi(optarg);
> + break;
> + default:
> + usage(argv[0]);
> + break;
> + }
> + }
> +
> if (intel_gen(devid) >= 9) {
> skl_wm_dump();
> } else if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) {
> --
> 2.26.3
>
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next prev parent reply other threads:[~2021-05-14 9:33 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-14 2:27 [igt-dev] [PATCH i-g-t 0/8] tools/intel_watermark: Support new platofrms Ville Syrjala
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 1/8] tools/intel_watermark: Parse WM_DBG to help diagnose watermark issues Ville Syrjala
2021-05-14 9:31 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 2/8] tools/intel_watermark: Use WM_SR_CNT to observe SR residency Ville Syrjala
2021-05-14 9:36 ` Lisovskiy, Stanislav [this message]
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 3/8] tools/intel_watermark: Deal with TGL planes Ville Syrjala
2021-05-14 9:47 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 4/8] tools/intel_watermark: Reduce the number of planes for rkl/adls/adlp Ville Syrjala
2021-05-14 9:53 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 5/8] tools/intel_watermark: TGL+ can have 4 pipes Ville Syrjala
2021-05-14 9:53 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 6/8] tools/intel_watermark: Make reg dump section less wide Ville Syrjala
2021-05-14 9:50 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 7/8] tools/intel_watermark: Handle ADL-P dedicated SAGV watermarks Ville Syrjala
2021-05-14 9:51 ` Lisovskiy, Stanislav
2021-04-14 2:27 ` [igt-dev] [PATCH i-g-t 8/8] tools/intel_watermark: Widen register bitfields Ville Syrjala
2021-05-14 9:51 ` Lisovskiy, Stanislav
2021-04-14 3:04 ` [igt-dev] ✓ Fi.CI.BAT: success for tools/intel_watermark: Support new platofrms Patchwork
2021-04-14 4:01 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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