From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Andreas Färber" <afaerber@suse.de>,
"Michael Turquette" <mturquette@baylibre.com>,
"Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 3/6] clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
Date: Wed, 26 May 2021 15:48:30 +0530 [thread overview]
Message-ID: <20210526101830.GE10723@work> (raw)
In-Reply-To: <20210316183753.GC1111731@BV030612LT>
On Tue, Mar 16, 2021 at 08:37:53PM +0200, Cristian Ciocaltea wrote:
> On Tue, Mar 16, 2021 at 09:47:39AM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Mar 08, 2021 at 07:18:28PM +0200, Cristian Ciocaltea wrote:
> > > The following clocks of the Actions Semi Owl S500 SoC have been defined
> > > to use a shared clock factor table 'bisp_factor_table[]': DE[1-2], VCE,
> > > VDE, BISP, SENSOR[0-1]
> > >
> > > There are several issues involved in this approach:
> > >
> > > * 'bisp_factor_table[]' describes the configuration of a regular 8-rates
> > > divider, so its usage is redundant. Additionally, judging by the BISP
> > > clock context, it is incomplete since it maps only 8 out of 12
> > > possible entries.
> > >
> > > * The clocks mentioned above are not identical in terms of the available
> > > rates, therefore cannot rely on the same factor table. Specifically,
> > > BISP and SENSOR* are standard 12-rate dividers so their configuration
> > > should rely on a proper clock div table, while VCE and VDE require a
> > > factor table that is a actually a subset of the one needed for DE[1-2]
> > > clocks.
> > >
> > > Let's fix this by implementing the following:
> > >
> > > * Add new factor tables 'de_factor_table' and 'hde_factor_table' to
> > > properly handle DE[1-2], VCE and VDE clocks.
> > >
> > > * Add a common div table 'std12rate_div_table' for BISP and SENSOR[0-1]
> > > clocks converted to OWL_COMP_DIV.
> > >
> > > * Drop the now unused 'bisp_factor_table[]'.
> > >
> >
> > Nice!
> >
> > > Additionally, since SENSOR[0-1] are not gated, unset the OWL_GATE_HW
> > > configuration and drop the CLK_IGNORE_UNUSED flag in their definitions.
> > >
> >
> > No. You should not screen the functionality exposed by the hw, that's what the
> > purpose of these CLK_ flags.
>
> I'm not sure I get this, or maybe I wasn't clear enough with my
> explanation regarding the changes to SENSOR clocks: they are not gated
> in hardware, hence the statement 'OWL_GATE_HW(CMU_DEVCLKEN0, 14, 0)'
> was invalid and I replaced it with '{ 0 }'.
>
This clock is gated in hw as per the datasheet. Again, please don't make
judgements based on the vendor code as it is not upto date with HW. I
know it is silly but that's how things are...
> Additionally, I assumed the 'CLK_IGNORE_UNUSED' flag makes sense only
> for the gated clocks. Do I miss something?
>
CLK_IGNORE_UNUSED is used by the clk framework to essentially skip
gating the clocks which are turned ON by the bootloader and there is no
other driver using it. But I think you can remove this flag because
there is no reason to leave this specific clock to be ON always.
Thanks,
Mani
> > Other than that, this patch looks good to me.
>
> Thanks,
> Cristi
>
> [...]
WARNING: multiple messages have this Message-ID (diff)
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Andreas Färber" <afaerber@suse.de>,
"Michael Turquette" <mturquette@baylibre.com>,
"Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 3/6] clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
Date: Wed, 26 May 2021 15:48:30 +0530 [thread overview]
Message-ID: <20210526101830.GE10723@work> (raw)
In-Reply-To: <20210316183753.GC1111731@BV030612LT>
On Tue, Mar 16, 2021 at 08:37:53PM +0200, Cristian Ciocaltea wrote:
> On Tue, Mar 16, 2021 at 09:47:39AM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Mar 08, 2021 at 07:18:28PM +0200, Cristian Ciocaltea wrote:
> > > The following clocks of the Actions Semi Owl S500 SoC have been defined
> > > to use a shared clock factor table 'bisp_factor_table[]': DE[1-2], VCE,
> > > VDE, BISP, SENSOR[0-1]
> > >
> > > There are several issues involved in this approach:
> > >
> > > * 'bisp_factor_table[]' describes the configuration of a regular 8-rates
> > > divider, so its usage is redundant. Additionally, judging by the BISP
> > > clock context, it is incomplete since it maps only 8 out of 12
> > > possible entries.
> > >
> > > * The clocks mentioned above are not identical in terms of the available
> > > rates, therefore cannot rely on the same factor table. Specifically,
> > > BISP and SENSOR* are standard 12-rate dividers so their configuration
> > > should rely on a proper clock div table, while VCE and VDE require a
> > > factor table that is a actually a subset of the one needed for DE[1-2]
> > > clocks.
> > >
> > > Let's fix this by implementing the following:
> > >
> > > * Add new factor tables 'de_factor_table' and 'hde_factor_table' to
> > > properly handle DE[1-2], VCE and VDE clocks.
> > >
> > > * Add a common div table 'std12rate_div_table' for BISP and SENSOR[0-1]
> > > clocks converted to OWL_COMP_DIV.
> > >
> > > * Drop the now unused 'bisp_factor_table[]'.
> > >
> >
> > Nice!
> >
> > > Additionally, since SENSOR[0-1] are not gated, unset the OWL_GATE_HW
> > > configuration and drop the CLK_IGNORE_UNUSED flag in their definitions.
> > >
> >
> > No. You should not screen the functionality exposed by the hw, that's what the
> > purpose of these CLK_ flags.
>
> I'm not sure I get this, or maybe I wasn't clear enough with my
> explanation regarding the changes to SENSOR clocks: they are not gated
> in hardware, hence the statement 'OWL_GATE_HW(CMU_DEVCLKEN0, 14, 0)'
> was invalid and I replaced it with '{ 0 }'.
>
This clock is gated in hw as per the datasheet. Again, please don't make
judgements based on the vendor code as it is not upto date with HW. I
know it is silly but that's how things are...
> Additionally, I assumed the 'CLK_IGNORE_UNUSED' flag makes sense only
> for the gated clocks. Do I miss something?
>
CLK_IGNORE_UNUSED is used by the clk framework to essentially skip
gating the clocks which are turned ON by the bootloader and there is no
other driver using it. But I think you can remove this flag because
there is no reason to leave this specific clock to be ON always.
Thanks,
Mani
> > Other than that, this patch looks good to me.
>
> Thanks,
> Cristi
>
> [...]
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next prev parent reply other threads:[~2021-05-26 10:18 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 17:18 [PATCH 0/6] Improve clock support for Actions S500 SoC Cristian Ciocaltea
2021-03-08 17:18 ` Cristian Ciocaltea
2021-03-08 17:18 ` [PATCH 1/6] clk: actions: Fix UART clock dividers on Owl " Cristian Ciocaltea
2021-03-08 17:18 ` Cristian Ciocaltea
2021-03-16 3:50 ` Manivannan Sadhasivam
2021-03-16 3:50 ` Manivannan Sadhasivam
2021-03-08 17:18 ` [PATCH 2/6] clk: actions: Fix SD clocks factor table " Cristian Ciocaltea
2021-03-08 17:18 ` Cristian Ciocaltea
2021-03-16 3:58 ` Manivannan Sadhasivam
2021-03-16 3:58 ` Manivannan Sadhasivam
2021-03-16 18:14 ` Cristian Ciocaltea
2021-03-16 18:14 ` Cristian Ciocaltea
2021-05-26 10:07 ` Manivannan Sadhasivam
2021-05-26 10:07 ` Manivannan Sadhasivam
2021-05-27 13:27 ` Cristian Ciocaltea
2021-05-27 13:27 ` Cristian Ciocaltea
2021-03-08 17:18 ` [PATCH 3/6] clk: actions: Fix bisp_factor_table based clocks " Cristian Ciocaltea
2021-03-08 17:18 ` Cristian Ciocaltea
2021-03-16 4:17 ` Manivannan Sadhasivam
2021-03-16 4:17 ` Manivannan Sadhasivam
2021-03-16 18:37 ` Cristian Ciocaltea
2021-03-16 18:37 ` Cristian Ciocaltea
2021-05-26 10:18 ` Manivannan Sadhasivam [this message]
2021-05-26 10:18 ` Manivannan Sadhasivam
2021-05-27 13:34 ` Cristian Ciocaltea
2021-05-27 13:34 ` Cristian Ciocaltea
2021-03-08 17:18 ` [PATCH 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain " Cristian Ciocaltea
2021-03-08 17:18 ` Cristian Ciocaltea
2021-03-16 5:45 ` Manivannan Sadhasivam
2021-03-16 5:45 ` Manivannan Sadhasivam
2021-03-16 18:50 ` Cristian Ciocaltea
2021-03-16 18:50 ` Cristian Ciocaltea
2021-05-26 10:12 ` Manivannan Sadhasivam
2021-05-26 10:12 ` Manivannan Sadhasivam
2021-05-27 13:45 ` Cristian Ciocaltea
2021-05-27 13:45 ` Cristian Ciocaltea
2021-03-08 17:18 ` [PATCH 5/6] dt-bindings: clock: Add NIC and ETHERNET bindings for Actions " Cristian Ciocaltea
2021-03-08 17:18 ` Cristian Ciocaltea
2021-03-16 22:00 ` Rob Herring
2021-03-16 22:00 ` Rob Herring
2021-03-08 17:18 ` [PATCH 6/6] clk: actions: Add NIC and ETHERNET clock support " Cristian Ciocaltea
2021-03-08 17:18 ` Cristian Ciocaltea
2021-03-16 5:52 ` Manivannan Sadhasivam
2021-03-16 5:52 ` Manivannan Sadhasivam
2021-03-16 19:02 ` Cristian Ciocaltea
2021-03-16 19:02 ` Cristian Ciocaltea
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