From: Ling Pei Lee <pei.lee.ling@intel.com>
To: Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Ong Boon Leong <boon.leong.ong@intel.com>,
Voon Weifeng <weifeng.voon@intel.com>,
Wong Vee Khee <vee.khee.wong@linux.intel.com>,
Wong Vee Khee <vee.khee.wong@intel.com>,
Tan Tee Min <tee.min.tan@intel.com>,
Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>,
netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: pei.lee.ling@intel.com
Subject: [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume()
Date: Mon, 21 Jun 2021 17:45:35 +0800 [thread overview]
Message-ID: <20210621094536.387442-4-pei.lee.ling@intel.com> (raw)
In-Reply-To: <20210621094536.387442-1-pei.lee.ling@intel.com>
From: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
After PHY received a magic packet, the PHY WOL event will be
triggered then PHY WOL event interrupt will be disarmed.
Ethtool settings will remain with WOL enabled after a S3/S4
suspend resume cycle as expected. Hence,the driver should
reconfigure the PHY settings to reenable/disable WOL
depending on the ethtool WOL settings in the resume flow.
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Co-developed-by: Ling Pei Lee <pei.lee.ling@intel.com>
Signed-off-by: Ling Pei Lee <pei.lee.ling@intel.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index a3b79ddcf08e..cd96e4d7a22e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7246,6 +7246,16 @@ int stmmac_resume(struct device *dev)
phylink_start(priv->phylink);
/* We may have called phylink_speed_down before */
phylink_speed_up(priv->phylink);
+ /* Reconfigure PHY WOL if the WOL is enabled in ethtool,
+ * so that subsequent WOL still can be triggered.
+ */
+ if (!priv->plat->pmt) {
+ struct ethtool_wolinfo phy_wol = { .cmd = ETHTOOL_GWOL };
+
+ phylink_ethtool_get_wol(priv->phylink, &phy_wol);
+ if (phy_wol.wolopts)
+ phylink_ethtool_set_wol(priv->phylink, &phy_wol);
+ }
rtnl_unlock();
}
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Ling Pei Lee <pei.lee.ling@intel.com>
To: Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Ong Boon Leong <boon.leong.ong@intel.com>,
Voon Weifeng <weifeng.voon@intel.com>,
Wong Vee Khee <vee.khee.wong@linux.intel.com>,
Wong Vee Khee <vee.khee.wong@intel.com>,
Tan Tee Min <tee.min.tan@intel.com>,
Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>,
netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: pei.lee.ling@intel.com
Subject: [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume()
Date: Mon, 21 Jun 2021 17:45:35 +0800 [thread overview]
Message-ID: <20210621094536.387442-4-pei.lee.ling@intel.com> (raw)
In-Reply-To: <20210621094536.387442-1-pei.lee.ling@intel.com>
From: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
After PHY received a magic packet, the PHY WOL event will be
triggered then PHY WOL event interrupt will be disarmed.
Ethtool settings will remain with WOL enabled after a S3/S4
suspend resume cycle as expected. Hence,the driver should
reconfigure the PHY settings to reenable/disable WOL
depending on the ethtool WOL settings in the resume flow.
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Co-developed-by: Ling Pei Lee <pei.lee.ling@intel.com>
Signed-off-by: Ling Pei Lee <pei.lee.ling@intel.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index a3b79ddcf08e..cd96e4d7a22e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7246,6 +7246,16 @@ int stmmac_resume(struct device *dev)
phylink_start(priv->phylink);
/* We may have called phylink_speed_down before */
phylink_speed_up(priv->phylink);
+ /* Reconfigure PHY WOL if the WOL is enabled in ethtool,
+ * so that subsequent WOL still can be triggered.
+ */
+ if (!priv->plat->pmt) {
+ struct ethtool_wolinfo phy_wol = { .cmd = ETHTOOL_GWOL };
+
+ phylink_ethtool_get_wol(priv->phylink, &phy_wol);
+ if (phy_wol.wolopts)
+ phylink_ethtool_set_wol(priv->phylink, &phy_wol);
+ }
rtnl_unlock();
}
--
2.25.1
next prev parent reply other threads:[~2021-06-21 9:48 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 9:45 [PATCH net-next V1 0/4] Add option to enable PHY WOL with PMT enabled Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 1/4] net: stmmac: " Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 2/4] stmmac: intel: Enable PHY WOL option in EHL Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee [this message]
2021-06-21 9:45 ` [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume() Ling Pei Lee
2021-06-21 13:05 ` Andrew Lunn
2021-06-21 13:05 ` Andrew Lunn
2021-06-23 10:06 ` Voon, Weifeng
2021-06-23 10:06 ` Voon, Weifeng
2021-06-23 19:36 ` Andrew Lunn
2021-06-23 19:36 ` Andrew Lunn
2021-06-24 10:07 ` Voon, Weifeng
2021-06-24 10:07 ` Voon, Weifeng
2021-06-24 13:40 ` Andrew Lunn
2021-06-24 13:40 ` Andrew Lunn
2021-06-25 15:58 ` Voon, Weifeng
2021-06-25 15:58 ` Voon, Weifeng
2021-06-25 16:35 ` Andrew Lunn
2021-06-25 16:35 ` Andrew Lunn
2021-06-28 7:48 ` Voon, Weifeng
2021-06-28 7:48 ` Voon, Weifeng
2021-06-25 16:48 ` Russell King (Oracle)
2021-06-25 16:48 ` Russell King (Oracle)
2021-06-28 7:54 ` Voon, Weifeng
2021-06-28 7:54 ` Voon, Weifeng
2021-06-21 9:45 ` [PATCH net-next V1 4/4] stmmac: intel: set PCI_D3hot in suspend Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210621094536.387442-4-pei.lee.ling@intel.com \
--to=pei.lee.ling@intel.com \
--cc=alexandre.torgue@st.com \
--cc=boon.leong.ong@intel.com \
--cc=davem@davemloft.net \
--cc=joabreu@synopsys.com \
--cc=kuba@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=linux@armlinux.org.uk \
--cc=mcoquelin.stm32@gmail.com \
--cc=michael.wei.hong.sit@intel.com \
--cc=netdev@vger.kernel.org \
--cc=peppe.cavallaro@st.com \
--cc=tee.min.tan@intel.com \
--cc=vee.khee.wong@intel.com \
--cc=vee.khee.wong@linux.intel.com \
--cc=weifeng.voon@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.