From: Andrew Lunn <andrew@lunn.ch>
To: "Voon, Weifeng" <weifeng.voon@intel.com>
Cc: "Ling, Pei Lee" <pei.lee.ling@intel.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"Ong, Boon Leong" <boon.leong.ong@intel.com>,
Wong Vee Khee <vee.khee.wong@linux.intel.com>,
"Wong, Vee Khee" <vee.khee.wong@intel.com>,
"Tan, Tee Min" <tee.min.tan@intel.com>,
"Sit, Michael Wei Hong" <michael.wei.hong.sit@intel.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume()
Date: Fri, 25 Jun 2021 18:35:57 +0200 [thread overview]
Message-ID: <YNYF7XCyCIuwT0mT@lunn.ch> (raw)
In-Reply-To: <CH0PR11MB53806D16AF301F16A298C70C88069@CH0PR11MB5380.namprd11.prod.outlook.com>
> I would like to rephase the commit message to make things clear:
>
> After PHY received a magic packet, the PHY WOL event will be
> triggered. At the same time, the "Magic Packet Match Detected" bit
> is set. In order for the PHY WOL event to be triggered again, the
> WOL event status of "Magic Packet Match Detected" bit needs to be
> cleared. When the PHY is in polling mode, the WOL event status needs
> to be manually cleared.
>
> Ethtool settings will remain with WOL enabled after a S3/S4
> suspend resume cycle as expected. Hence, the driver should
> reconfigure the PHY settings to reenable/disable WOL
> depending on the ethtool WOL settings in the MAC resume flow.
> The PHY set_wol flow would clear the WOL event status.
I would still argue that making use of a WoL interrupts and PHY
polling is just wrong. But i assume you cannot fix this? You have a
hardware design error?
The problem with this solution is you need to modify every MAC driver
using the Marvell PHY. It does not scale.
Please try to find a solution within phylib or the marvell
driver. Something which will work for any broken setup which is using
WoL interrupts combined with polling.
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: "Voon, Weifeng" <weifeng.voon@intel.com>
Cc: "Ling, Pei Lee" <pei.lee.ling@intel.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"Ong, Boon Leong" <boon.leong.ong@intel.com>,
Wong Vee Khee <vee.khee.wong@linux.intel.com>,
"Wong, Vee Khee" <vee.khee.wong@intel.com>,
"Tan, Tee Min" <tee.min.tan@intel.com>,
"Sit, Michael Wei Hong" <michael.wei.hong.sit@intel.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume()
Date: Fri, 25 Jun 2021 18:35:57 +0200 [thread overview]
Message-ID: <YNYF7XCyCIuwT0mT@lunn.ch> (raw)
In-Reply-To: <CH0PR11MB53806D16AF301F16A298C70C88069@CH0PR11MB5380.namprd11.prod.outlook.com>
> I would like to rephase the commit message to make things clear:
>
> After PHY received a magic packet, the PHY WOL event will be
> triggered. At the same time, the "Magic Packet Match Detected" bit
> is set. In order for the PHY WOL event to be triggered again, the
> WOL event status of "Magic Packet Match Detected" bit needs to be
> cleared. When the PHY is in polling mode, the WOL event status needs
> to be manually cleared.
>
> Ethtool settings will remain with WOL enabled after a S3/S4
> suspend resume cycle as expected. Hence, the driver should
> reconfigure the PHY settings to reenable/disable WOL
> depending on the ethtool WOL settings in the MAC resume flow.
> The PHY set_wol flow would clear the WOL event status.
I would still argue that making use of a WoL interrupts and PHY
polling is just wrong. But i assume you cannot fix this? You have a
hardware design error?
The problem with this solution is you need to modify every MAC driver
using the Marvell PHY. It does not scale.
Please try to find a solution within phylib or the marvell
driver. Something which will work for any broken setup which is using
WoL interrupts combined with polling.
Andrew
next prev parent reply other threads:[~2021-06-25 16:38 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 9:45 [PATCH net-next V1 0/4] Add option to enable PHY WOL with PMT enabled Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 1/4] net: stmmac: " Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 2/4] stmmac: intel: Enable PHY WOL option in EHL Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume() Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
2021-06-21 13:05 ` Andrew Lunn
2021-06-21 13:05 ` Andrew Lunn
2021-06-23 10:06 ` Voon, Weifeng
2021-06-23 10:06 ` Voon, Weifeng
2021-06-23 19:36 ` Andrew Lunn
2021-06-23 19:36 ` Andrew Lunn
2021-06-24 10:07 ` Voon, Weifeng
2021-06-24 10:07 ` Voon, Weifeng
2021-06-24 13:40 ` Andrew Lunn
2021-06-24 13:40 ` Andrew Lunn
2021-06-25 15:58 ` Voon, Weifeng
2021-06-25 15:58 ` Voon, Weifeng
2021-06-25 16:35 ` Andrew Lunn [this message]
2021-06-25 16:35 ` Andrew Lunn
2021-06-28 7:48 ` Voon, Weifeng
2021-06-28 7:48 ` Voon, Weifeng
2021-06-25 16:48 ` Russell King (Oracle)
2021-06-25 16:48 ` Russell King (Oracle)
2021-06-28 7:54 ` Voon, Weifeng
2021-06-28 7:54 ` Voon, Weifeng
2021-06-21 9:45 ` [PATCH net-next V1 4/4] stmmac: intel: set PCI_D3hot in suspend Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YNYF7XCyCIuwT0mT@lunn.ch \
--to=andrew@lunn.ch \
--cc=alexandre.torgue@st.com \
--cc=boon.leong.ong@intel.com \
--cc=davem@davemloft.net \
--cc=joabreu@synopsys.com \
--cc=kuba@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=linux@armlinux.org.uk \
--cc=mcoquelin.stm32@gmail.com \
--cc=michael.wei.hong.sit@intel.com \
--cc=netdev@vger.kernel.org \
--cc=pei.lee.ling@intel.com \
--cc=peppe.cavallaro@st.com \
--cc=tee.min.tan@intel.com \
--cc=vee.khee.wong@intel.com \
--cc=vee.khee.wong@linux.intel.com \
--cc=weifeng.voon@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.