All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Qi Liu <liuqi115@huawei.com>
Cc: <will@kernel.org>, <mark.rutland@arm.com>, <bhelgaas@google.com>,
	<linux-pci@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
	<zhangshaokun@hisilicon.com>
Subject: Re: [PATCH v10 2/2] drivers/perf: hisi: Add driver for HiSilicon PCIe PMU
Date: Wed, 6 Oct 2021 15:06:28 +0100	[thread overview]
Message-ID: <20211006150628.00007cbf@Huawei.com> (raw)
In-Reply-To: <20210915074524.18040-3-liuqi115@huawei.com>

On Wed, 15 Sep 2021 15:45:24 +0800
Qi Liu <liuqi115@huawei.com> wrote:

> PCIe PMU Root Complex Integrated End Point(RCiEP) device is supported
> to sample bandwidth, latency, buffer occupation etc.
> 
> Each PMU RCiEP device monitors multiple Root Ports, and each RCiEP is
> registered as a PMU in /sys/bus/event_source/devices, so users can
> select target PMU, and use filter to do further sets.
> 
> Filtering options contains:
> event     - select the event.
> port      - select target Root Ports. Information of Root Ports are
>             shown under sysfs.
> bdf       - select requester_id of target EP device.
> trig_len  - set trigger condition for starting event statistics.
> trig_mode - set trigger mode. 0 means starting to statistic when bigger
>             than trigger condition, and 1 means smaller.
> thr_len   - set threshold for statistics.
> thr_mode  - set threshold mode. 0 means count when bigger than threshold,
>             and 1 means smaller.
> 
> Reviewed-by: John Garry <john.garry@huawei.com>
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> ---
Hi Qi,

One trivial thing I just noticed below that can be easily fixed up by a follow up
patch if that makes sense.

Thanks,

Jonathan

> +/*
> + * Events with the "dl" suffix in their names count performance in DL layer,
> + * otherswise, events count performance in TL layer.

This comment looks to be out of date..

> + */
> +static struct attribute *hisi_pcie_pmu_events_attr[] = {
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mwr_latency, 0x0010),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mwr_cnt, 0x10010),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_latency, 0x0210),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_cnt, 0x10210),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_latency, 0x0011),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_cnt, 0x10011),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_flux, 0x1005),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_time, 0x11005),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_flux, 0x2004),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_time, 0x12004),
> +	NULL
> +};

WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Qi Liu <liuqi115@huawei.com>
Cc: <will@kernel.org>, <mark.rutland@arm.com>, <bhelgaas@google.com>,
	<linux-pci@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
	<zhangshaokun@hisilicon.com>
Subject: Re: [PATCH v10 2/2] drivers/perf: hisi: Add driver for HiSilicon PCIe PMU
Date: Wed, 6 Oct 2021 15:06:28 +0100	[thread overview]
Message-ID: <20211006150628.00007cbf@Huawei.com> (raw)
In-Reply-To: <20210915074524.18040-3-liuqi115@huawei.com>

On Wed, 15 Sep 2021 15:45:24 +0800
Qi Liu <liuqi115@huawei.com> wrote:

> PCIe PMU Root Complex Integrated End Point(RCiEP) device is supported
> to sample bandwidth, latency, buffer occupation etc.
> 
> Each PMU RCiEP device monitors multiple Root Ports, and each RCiEP is
> registered as a PMU in /sys/bus/event_source/devices, so users can
> select target PMU, and use filter to do further sets.
> 
> Filtering options contains:
> event     - select the event.
> port      - select target Root Ports. Information of Root Ports are
>             shown under sysfs.
> bdf       - select requester_id of target EP device.
> trig_len  - set trigger condition for starting event statistics.
> trig_mode - set trigger mode. 0 means starting to statistic when bigger
>             than trigger condition, and 1 means smaller.
> thr_len   - set threshold for statistics.
> thr_mode  - set threshold mode. 0 means count when bigger than threshold,
>             and 1 means smaller.
> 
> Reviewed-by: John Garry <john.garry@huawei.com>
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> ---
Hi Qi,

One trivial thing I just noticed below that can be easily fixed up by a follow up
patch if that makes sense.

Thanks,

Jonathan

> +/*
> + * Events with the "dl" suffix in their names count performance in DL layer,
> + * otherswise, events count performance in TL layer.

This comment looks to be out of date..

> + */
> +static struct attribute *hisi_pcie_pmu_events_attr[] = {
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mwr_latency, 0x0010),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mwr_cnt, 0x10010),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_latency, 0x0210),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_cnt, 0x10210),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_latency, 0x0011),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_cnt, 0x10011),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_flux, 0x1005),
> +	HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_time, 0x11005),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_flux, 0x2004),
> +	HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_time, 0x12004),
> +	NULL
> +};

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-10-06 14:06 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-15  7:45 [PATCH v10 0/2] drivers/perf: hisi: Add support for PCIe PMU Qi Liu
2021-09-15  7:45 ` Qi Liu
2021-09-15  7:45 ` [PATCH v10 1/2] docs: perf: Add description for HiSilicon PCIe PMU driver Qi Liu
2021-09-15  7:45   ` Qi Liu
2021-09-15  7:45 ` [PATCH v10 2/2] drivers/perf: hisi: Add driver for HiSilicon PCIe PMU Qi Liu
2021-09-15  7:45   ` Qi Liu
2021-10-06 14:06   ` Jonathan Cameron [this message]
2021-10-06 14:06     ` Jonathan Cameron
2021-10-08  2:41     ` liuqi (BA)
2021-10-08  2:41       ` liuqi (BA)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211006150628.00007cbf@Huawei.com \
    --to=jonathan.cameron@huawei.com \
    --cc=bhelgaas@google.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linuxarm@huawei.com \
    --cc=liuqi115@huawei.com \
    --cc=mark.rutland@arm.com \
    --cc=will@kernel.org \
    --cc=zhangshaokun@hisilicon.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.