From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v2 2/4] mtd: rawnand: Fix nand_choose_best_timings() on unsupported interface
Date: Fri, 19 Nov 2021 10:08:59 +0100 [thread overview]
Message-ID: <20211119100859.00b61e94@xps13> (raw)
In-Reply-To: <20211119073909.1492538-3-herve.codina@bootlin.com>
Hi Herve,
herve.codina@bootlin.com wrote on Fri, 19 Nov 2021 08:39:07 +0100:
> When the NV-DDR interface is not supported by the NAND chip,
> the value of onfi->nvddr_timing_modes is 0. In this case,
> the best_mode variable value in nand_choose_best_nvddr_timings()
> is -1. The last for-loop is skipped and the function returns an
> uninitialized value.
Actually is not the first time this uninitialized value triggers bells
but, while I think in the SDR path it is still not needed,in the DDR
patch you are right that something is missing.
> If this returned value is 0, the nand_choose_best_sdr_timings()
> is not executed and no 'best timing' are set. This leads the host
> controller and the NAND chip working at default mode 0 timing
> even if a better timing can be used.
>
> Fix this uninitialzed returned value.
typo ^
>
> nand_choose_best_sdr_timings() is pretty similar to
> nand_choose_best_nvddr_timings(). Even if onfi->sdr_timing_modes
> should never be seen as 0, nand_choose_best_sdr_timings() returned
> value is fixed.
I still don't think it really needed by let's keep so everyone
(including robots) is happy :)
>
> Fixes: a9ecc8c814e9 ("mtd: rawnand: Choose the best timings, NV-DDR included")
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---
> Changes v1 to v2:
> - New patch in v2 series
>
> drivers/mtd/nand/raw/nand_base.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index 5c6b065837ef..a130320de412 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -926,7 +926,7 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip,
> struct nand_sdr_timings *spec_timings)
> {
> const struct nand_controller_ops *ops = chip->controller->ops;
> - int best_mode = 0, mode, ret;
> + int best_mode = 0, mode, ret = -EOPNOTSUPP;
>
> iface->type = NAND_SDR_IFACE;
>
> @@ -977,7 +977,7 @@ int nand_choose_best_nvddr_timings(struct nand_chip *chip,
> struct nand_nvddr_timings *spec_timings)
> {
> const struct nand_controller_ops *ops = chip->controller->ops;
> - int best_mode = 0, mode, ret;
> + int best_mode = 0, mode, ret = -EOPNOTSUPP;
>
> iface->type = NAND_NVDDR_IFACE;
>
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v2 2/4] mtd: rawnand: Fix nand_choose_best_timings() on unsupported interface
Date: Fri, 19 Nov 2021 10:08:59 +0100 [thread overview]
Message-ID: <20211119100859.00b61e94@xps13> (raw)
In-Reply-To: <20211119073909.1492538-3-herve.codina@bootlin.com>
Hi Herve,
herve.codina@bootlin.com wrote on Fri, 19 Nov 2021 08:39:07 +0100:
> When the NV-DDR interface is not supported by the NAND chip,
> the value of onfi->nvddr_timing_modes is 0. In this case,
> the best_mode variable value in nand_choose_best_nvddr_timings()
> is -1. The last for-loop is skipped and the function returns an
> uninitialized value.
Actually is not the first time this uninitialized value triggers bells
but, while I think in the SDR path it is still not needed,in the DDR
patch you are right that something is missing.
> If this returned value is 0, the nand_choose_best_sdr_timings()
> is not executed and no 'best timing' are set. This leads the host
> controller and the NAND chip working at default mode 0 timing
> even if a better timing can be used.
>
> Fix this uninitialzed returned value.
typo ^
>
> nand_choose_best_sdr_timings() is pretty similar to
> nand_choose_best_nvddr_timings(). Even if onfi->sdr_timing_modes
> should never be seen as 0, nand_choose_best_sdr_timings() returned
> value is fixed.
I still don't think it really needed by let's keep so everyone
(including robots) is happy :)
>
> Fixes: a9ecc8c814e9 ("mtd: rawnand: Choose the best timings, NV-DDR included")
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---
> Changes v1 to v2:
> - New patch in v2 series
>
> drivers/mtd/nand/raw/nand_base.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index 5c6b065837ef..a130320de412 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -926,7 +926,7 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip,
> struct nand_sdr_timings *spec_timings)
> {
> const struct nand_controller_ops *ops = chip->controller->ops;
> - int best_mode = 0, mode, ret;
> + int best_mode = 0, mode, ret = -EOPNOTSUPP;
>
> iface->type = NAND_SDR_IFACE;
>
> @@ -977,7 +977,7 @@ int nand_choose_best_nvddr_timings(struct nand_chip *chip,
> struct nand_nvddr_timings *spec_timings)
> {
> const struct nand_controller_ops *ops = chip->controller->ops;
> - int best_mode = 0, mode, ret;
> + int best_mode = 0, mode, ret = -EOPNOTSUPP;
>
> iface->type = NAND_NVDDR_IFACE;
>
Thanks,
Miquèl
next prev parent reply other threads:[~2021-11-19 9:09 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-19 7:39 [PATCH v2 0/4] mtd: rawnand: Fixes nand infra delay setting and FSMC nand controller Herve Codina
2021-11-19 7:39 ` Herve Codina
2021-11-19 7:39 ` [PATCH v2 1/4] mtd: rawnand: Fix nand_erase_op delay Herve Codina
2021-11-19 7:39 ` Herve Codina
2021-11-19 8:18 ` Miquel Raynal
2021-11-19 8:18 ` Miquel Raynal
2021-11-19 7:39 ` [PATCH v2 2/4] mtd: rawnand: Fix nand_choose_best_timings() on unsupported interface Herve Codina
2021-11-19 7:39 ` Herve Codina
2021-11-19 9:08 ` Miquel Raynal [this message]
2021-11-19 9:08 ` Miquel Raynal
2021-11-19 7:39 ` [PATCH v2 3/4] mtd: rawnand: fsmc: Take instruction delay into account Herve Codina
2021-11-19 7:39 ` Herve Codina
2021-11-19 7:39 ` [PATCH v2 4/4] mtd: rawnand: fsmc: Fix timing computation Herve Codina
2021-11-19 7:39 ` Herve Codina
2021-11-19 8:32 ` Miquel Raynal
2021-11-19 8:32 ` Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211119100859.00b61e94@xps13 \
--to=miquel.raynal@bootlin.com \
--cc=herve.codina@bootlin.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=richard@nod.at \
--cc=thomas.petazzoni@bootlin.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.