From: Aswath Govindraju <a-govindraju@ti.com>
Cc: <u-boot@lists.denx.de>, Wolfgang Denk <wd@denx.de>,
Hari Nagalla <hnagalla@ti.com>, David Huang <d-huang@ti.com>,
Keerthy <j-keerthy@ti.com>, Dave Gerlach <d-gerlach@ti.com>,
Suman Anna <s-anna@ti.com>, Nishanth Menon <nm@ti.com>,
Tero Kristo <kristo@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Christian Hewitt <christianshewitt@gmail.com>,
Tim Harvey <tharvey@gateworks.com>,
Peter Robinson <pbrobinson@gmail.com>,
Kever Yang <kever.yang@rock-chips.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Fabio Estevam <festevam@denx.de>,
Andre Przywara <andre.przywara@arm.com>,
Jaehoon Chung <jh80.chung@samsung.com>,
Sean Anderson <seanga2@gmail.com>,
Lukasz Majewski <lukma@denx.de>,
Aswath Govindraju <a-govindraju@ti.com>
Subject: [PATCH v2 06/20] drivers: dma: Add support for J721S2
Date: Tue, 11 Jan 2022 13:25:31 +0530 [thread overview]
Message-ID: <20220111075545.1880-7-a-govindraju@ti.com> (raw)
In-Reply-To: <20220111075545.1880-1-a-govindraju@ti.com>
From: David Huang <d-huang@ti.com>
Add support for DMA in J721S2 SoC.
Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
drivers/dma/ti/Makefile | 1 +
drivers/dma/ti/k3-psil-j721s2.c | 167 ++++++++++++++++++++++++++
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 2 +
drivers/firmware/ti_sci_static_data.h | 40 +++++-
5 files changed, 208 insertions(+), 3 deletions(-)
create mode 100644 drivers/dma/ti/k3-psil-j721s2.c
diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index 0391cd3d80c9..6a4f4f1365bd 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -5,4 +5,5 @@ obj-$(CONFIG_TI_K3_PSIL) += k3-psil-data.o
k3-psil-data-y += k3-psil.o
k3-psil-data-$(CONFIG_SOC_K3_AM6) += k3-psil-am654.o
k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o
+k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
diff --git a/drivers/dma/ti/k3-psil-j721s2.c b/drivers/dma/ti/k3-psil-j721s2.c
new file mode 100644
index 000000000000..4c4172a4d271
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-j721s2.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include <linux/kernel.h>
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ }, \
+ }
+
+#define PSIL_PDMA_XY_PKT(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pkt_mode = 1, \
+ }, \
+ }
+
+#define PSIL_PDMA_MCASP(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pdma_acc32 = 1, \
+ .pdma_burst = 1, \
+ }, \
+ }
+
+#define PSIL_ETHERNET(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1, \
+ .psd_size = 16, \
+ }, \
+ }
+
+#define PSIL_SA2UL(x, tx) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1, \
+ .psd_size = 64, \
+ .notdpkt = tx, \
+ }, \
+ }
+
+/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
+static struct psil_ep j721s2_src_ep_map[] = {
+ /* PDMA_MCASP - McASP0-4 */
+ PSIL_PDMA_MCASP(0x4400),
+ PSIL_PDMA_MCASP(0x4401),
+ PSIL_PDMA_MCASP(0x4402),
+ PSIL_PDMA_MCASP(0x4403),
+ PSIL_PDMA_MCASP(0x4404),
+ /* PDMA_SPI_G0 - SPI0-3 */
+ PSIL_PDMA_XY_PKT(0x4600),
+ PSIL_PDMA_XY_PKT(0x4601),
+ PSIL_PDMA_XY_PKT(0x4602),
+ PSIL_PDMA_XY_PKT(0x4603),
+ PSIL_PDMA_XY_PKT(0x4604),
+ PSIL_PDMA_XY_PKT(0x4605),
+ PSIL_PDMA_XY_PKT(0x4606),
+ PSIL_PDMA_XY_PKT(0x4607),
+ PSIL_PDMA_XY_PKT(0x4608),
+ PSIL_PDMA_XY_PKT(0x4609),
+ PSIL_PDMA_XY_PKT(0x460a),
+ PSIL_PDMA_XY_PKT(0x460b),
+ PSIL_PDMA_XY_PKT(0x460c),
+ PSIL_PDMA_XY_PKT(0x460d),
+ PSIL_PDMA_XY_PKT(0x460e),
+ PSIL_PDMA_XY_PKT(0x460f),
+ /* PDMA_SPI_G1 - SPI4-7 */
+ PSIL_PDMA_XY_PKT(0x4610),
+ PSIL_PDMA_XY_PKT(0x4611),
+ PSIL_PDMA_XY_PKT(0x4612),
+ PSIL_PDMA_XY_PKT(0x4613),
+ PSIL_PDMA_XY_PKT(0x4614),
+ PSIL_PDMA_XY_PKT(0x4615),
+ PSIL_PDMA_XY_PKT(0x4616),
+ PSIL_PDMA_XY_PKT(0x4617),
+ PSIL_PDMA_XY_PKT(0x4618),
+ PSIL_PDMA_XY_PKT(0x4619),
+ PSIL_PDMA_XY_PKT(0x461a),
+ PSIL_PDMA_XY_PKT(0x461b),
+ PSIL_PDMA_XY_PKT(0x461c),
+ PSIL_PDMA_XY_PKT(0x461d),
+ PSIL_PDMA_XY_PKT(0x461e),
+ PSIL_PDMA_XY_PKT(0x461f),
+ /* PDMA_USART_G0 - UART0-1 */
+ PSIL_PDMA_XY_PKT(0x4700),
+ PSIL_PDMA_XY_PKT(0x4701),
+ /* PDMA_USART_G1 - UART2-3 */
+ PSIL_PDMA_XY_PKT(0x4702),
+ PSIL_PDMA_XY_PKT(0x4703),
+ /* PDMA_USART_G2 - UART4-9 */
+ PSIL_PDMA_XY_PKT(0x4704),
+ PSIL_PDMA_XY_PKT(0x4705),
+ PSIL_PDMA_XY_PKT(0x4706),
+ PSIL_PDMA_XY_PKT(0x4707),
+ PSIL_PDMA_XY_PKT(0x4708),
+ PSIL_PDMA_XY_PKT(0x4709),
+ /* CPSW0 */
+ PSIL_ETHERNET(0x7000),
+ /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
+ PSIL_PDMA_XY_PKT(0x7100),
+ PSIL_PDMA_XY_PKT(0x7101),
+ PSIL_PDMA_XY_PKT(0x7102),
+ PSIL_PDMA_XY_PKT(0x7103),
+ /* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
+ PSIL_PDMA_XY_PKT(0x7200),
+ PSIL_PDMA_XY_PKT(0x7201),
+ PSIL_PDMA_XY_PKT(0x7202),
+ PSIL_PDMA_XY_PKT(0x7203),
+ PSIL_PDMA_XY_PKT(0x7204),
+ PSIL_PDMA_XY_PKT(0x7205),
+ PSIL_PDMA_XY_PKT(0x7206),
+ PSIL_PDMA_XY_PKT(0x7207),
+ /* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
+ PSIL_PDMA_XY_PKT(0x7300),
+ /* MCU_PDMA_ADC - ADC0-1 */
+ PSIL_PDMA_XY_TR(0x7400),
+ PSIL_PDMA_XY_TR(0x7401),
+ PSIL_PDMA_XY_TR(0x7402),
+ PSIL_PDMA_XY_TR(0x7403),
+ /* SA2UL */
+ PSIL_SA2UL(0x7500, 0),
+ PSIL_SA2UL(0x7501, 0),
+ PSIL_SA2UL(0x7502, 0),
+ PSIL_SA2UL(0x7503, 0),
+};
+
+/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
+static struct psil_ep j721s2_dst_ep_map[] = {
+ /* CPSW0 */
+ PSIL_ETHERNET(0xf000),
+ PSIL_ETHERNET(0xf001),
+ PSIL_ETHERNET(0xf002),
+ PSIL_ETHERNET(0xf003),
+ PSIL_ETHERNET(0xf004),
+ PSIL_ETHERNET(0xf005),
+ PSIL_ETHERNET(0xf006),
+ PSIL_ETHERNET(0xf007),
+ /* SA2UL */
+ PSIL_SA2UL(0xf500, 1),
+ PSIL_SA2UL(0xf501, 1),
+};
+
+struct psil_ep_map j721s2_ep_map = {
+ .name = "j721s2",
+ .src = j721s2_src_ep_map,
+ .src_count = ARRAY_SIZE(j721s2_src_ep_map),
+ .dst = j721s2_dst_ep_map,
+ .dst_count = ARRAY_SIZE(j721s2_dst_ep_map),
+};
diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h
index 02d1c201a989..77acaf21393a 100644
--- a/drivers/dma/ti/k3-psil-priv.h
+++ b/drivers/dma/ti/k3-psil-priv.h
@@ -39,6 +39,7 @@ struct psil_endpoint_config *psil_get_ep_config(u32 thread_id);
/* SoC PSI-L endpoint maps */
extern struct psil_ep_map am654_ep_map;
extern struct psil_ep_map j721e_ep_map;
+extern struct psil_ep_map j721s2_ep_map;
extern struct psil_ep_map am64_ep_map;
#endif /* K3_PSIL_PRIV_H_ */
diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c
index e82f8075417b..8b2129d4f58d 100644
--- a/drivers/dma/ti/k3-psil.c
+++ b/drivers/dma/ti/k3-psil.c
@@ -20,6 +20,8 @@ struct psil_endpoint_config *psil_get_ep_config(u32 thread_id)
soc_ep_map = &am654_ep_map;
else if (IS_ENABLED(CONFIG_SOC_K3_J721E))
soc_ep_map = &j721e_ep_map;
+ else if (IS_ENABLED(CONFIG_SOC_K3_J721S2))
+ soc_ep_map = &j721s2_ep_map;
else if (IS_ENABLED(CONFIG_SOC_K3_AM642))
soc_ep_map = &am64_ep_map;
}
diff --git a/drivers/firmware/ti_sci_static_data.h b/drivers/firmware/ti_sci_static_data.h
index 3c506e667ac1..e6a3b66c03fb 100644
--- a/drivers/firmware/ti_sci_static_data.h
+++ b/drivers/firmware/ti_sci_static_data.h
@@ -56,21 +56,21 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
{
.dev_id = 235,
.subtype = 1,
- .range_start = 144,
+ .range_start = 124,
.range_num = 32,
},
/* TX channels */
{
.dev_id = 236,
.subtype = 13,
- .range_start = 7,
+ .range_start = 6,
.range_num = 2,
},
/* RX channels */
{
.dev_id = 236,
.subtype = 10,
- .range_start = 7,
+ .range_start = 6,
.range_num = 2,
},
/* RX Free flows */
@@ -84,6 +84,40 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
};
#endif /* CONFIG_TARGET_J7200_R5_EVM */
+#if IS_ENABLED(CONFIG_TARGET_J721S2_R5_EVM)
+static struct ti_sci_resource_static_data rm_static_data[] = {
+ /* Free rings */
+ {
+ .dev_id = 272,
+ .subtype = 1,
+ .range_start = 180,
+ .range_num = 32,
+ },
+ /* TX channels */
+ {
+ .dev_id = 273,
+ .subtype = 13,
+ .range_start = 12,
+ .range_num = 2,
+ },
+ /* RX channels */
+ {
+ .dev_id = 273,
+ .subtype = 10,
+ .range_start = 12,
+ .range_num = 2,
+ },
+ /* RX Free flows */
+ {
+ .dev_id = 273,
+ .subtype = 0,
+ .range_start = 80,
+ .range_num = 8,
+ },
+ { },
+};
+#endif /* CONFIG_TARGET_J721S2_R5_EVM */
+
#else
static struct ti_sci_resource_static_data rm_static_data[] = {
{ },
--
2.17.1
next prev parent reply other threads:[~2022-01-11 7:57 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-11 7:55 [PATCH v2 00/20] J721S2: Add initial support Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 01/20] remoteproc: k3_system_controller: Support optional boot_notification channel Aswath Govindraju
2022-01-13 14:12 ` Tom Rini
2022-01-17 5:31 ` Aswath Govindraju
2022-01-17 6:52 ` Aswath Govindraju
2022-01-17 13:54 ` Tom Rini
2022-01-18 5:56 ` Aswath Govindraju
2022-01-18 12:50 ` Tom Rini
2022-01-18 13:50 ` Nishanth Menon
2022-01-18 14:17 ` Tom Rini
2022-01-11 7:55 ` [PATCH v2 02/20] ram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instance Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 03/20] ram: k3-ddrss: Add support for multiple instances of DDR subsystems Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 04/20] ram: k3-ddrss: Add support for configuring MSMC subsystem in case of Multiple " Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 05/20] arm: K3: Add basic support for J721S2 SoC definition Aswath Govindraju
2022-01-13 14:13 ` Tom Rini
2022-01-11 7:55 ` Aswath Govindraju [this message]
2022-01-11 7:55 ` [PATCH v2 07/20] clk: clk-k3: Add support for J721S2 SoC Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 08/20] power: domain: ti: " Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 09/20] ram: k3-ddrss: " Aswath Govindraju
2022-01-13 14:15 ` Tom Rini
2022-01-17 6:31 ` Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 10/20] soc: ti: k3-socinfo: Add entry " Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 11/20] board: ti: j721s2: Add board support for J721S2 Aswath Govindraju
2022-01-13 14:16 ` Tom Rini
2022-01-17 6:42 ` Aswath Govindraju
2022-01-17 13:54 ` Tom Rini
2022-01-11 7:55 ` [PATCH v2 12/20] dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC Aswath Govindraju
2022-01-13 14:17 ` Tom Rini
2022-01-17 5:41 ` Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 13/20] dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2 Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 14/20] arm: dts: Add initial support for J721S2 SoC Aswath Govindraju
2022-01-13 14:08 ` Tom Rini
2022-01-13 14:16 ` Aswath Govindraju
2022-01-13 14:23 ` Tom Rini
2022-01-11 7:55 ` [PATCH v2 15/20] arm: dts: Add initial support for J721S2 System on Module Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 16/20] arm: dts: Add support for A72 specific J721S2 Common Processor Board Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 17/20] arm: dts: k3-j721s2: Add r5 specific dt support Aswath Govindraju
2022-01-13 14:11 ` Tom Rini
2022-01-11 7:55 ` [PATCH v2 18/20] arm: dts: k3-j721s2-ddr: Add DDR support Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 19/20] configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig Aswath Govindraju
2022-01-11 7:55 ` [PATCH v2 20/20] configs: j721s2_evm_a72_defconfig: Add A72 " Aswath Govindraju
2022-01-18 7:30 ` [PATCH v2 00/20] J721S2: Add initial support Aswath Govindraju
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220111075545.1880-7-a-govindraju@ti.com \
--to=a-govindraju@ti.com \
--cc=andre.przywara@arm.com \
--cc=christianshewitt@gmail.com \
--cc=d-gerlach@ti.com \
--cc=d-huang@ti.com \
--cc=festevam@denx.de \
--cc=hnagalla@ti.com \
--cc=j-keerthy@ti.com \
--cc=jh80.chung@samsung.com \
--cc=kever.yang@rock-chips.com \
--cc=kishon@ti.com \
--cc=kristo@kernel.org \
--cc=lukma@denx.de \
--cc=narmstrong@baylibre.com \
--cc=nm@ti.com \
--cc=pbrobinson@gmail.com \
--cc=s-anna@ti.com \
--cc=seanga2@gmail.com \
--cc=tharvey@gateworks.com \
--cc=u-boot@lists.denx.de \
--cc=vigneshr@ti.com \
--cc=wd@denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.