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From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
	atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
	hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
	gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
	behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr,
	allen.baum@esperantotech.com, jscheid@ventanamicro.com,
	rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
	philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH v7 05/13] riscv: implement ALTERNATIVE_2 macro
Date: Mon,  7 Mar 2022 21:53:02 +0100	[thread overview]
Message-ID: <20220307205310.1905628-6-heiko@sntech.de> (raw)
In-Reply-To: <20220307205310.1905628-1-heiko@sntech.de>

When the alternatives were added the commit already provided a template
on how to implement 2 different alternatives for one piece of code.

Make this usable.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/include/asm/alternative-macros.h | 52 +++++++++++++--------
 1 file changed, 32 insertions(+), 20 deletions(-)

diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
index 92da6b3920a3..baf649293288 100644
--- a/arch/riscv/include/asm/alternative-macros.h
+++ b/arch/riscv/include/asm/alternative-macros.h
@@ -37,6 +37,20 @@
 #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
 	__ALTERNATIVE_CFG old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k)
 
+.macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
+				  new_c_2, vendor_id_2, errata_id_2, enable_2
+886 :
+	\old_c
+887 :
+	ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
+	ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
+.endm
+
+#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
+				  new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
+	__ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \
+				   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2)
+
 #else /* !__ASSEMBLY__ */
 
 #include <asm/asm.h>
@@ -72,6 +86,19 @@
 #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k)	\
 	__ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
 
+#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
+				  new_c_2, vendor_id_2, errata_id_2, enable_2) \
+	"886 :\n"	\
+	old_c "\n"	\
+	"887 :\n"	\
+	ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1) \
+	ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2)
+
+#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1,		\
+				  new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2)		\
+	__ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1),	\
+				   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2))
+
 #endif /* __ASSEMBLY__ */
 
 /*
@@ -96,25 +123,10 @@
  * this case, this vendor can create a new macro ALTERNATIVE_2() based
  * on the following sample code and then replace ALTERNATIVE() with
  * ALTERNATIVE_2() to append its customized content.
- *
- * .macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
- *                                   new_c_2, vendor_id_2, errata_id_2, enable_2
- * 886 :
- *      \old_c
- * 887 :
- *      ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
- *      ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
- * .endm
- *
- * #define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
- *                                   new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
- *        __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \
- *                                   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2) \
- *
- * #define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
- *                                    new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
- *         _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
- *                                         new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)
- *
  */
+#define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
+				   new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
+	_ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
+					new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)
+
 #endif
-- 
2.30.2


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
	atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
	hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
	gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
	behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr,
	allen.baum@esperantotech.com, jscheid@ventanamicro.com,
	rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
	philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH v7 05/13] riscv: implement ALTERNATIVE_2 macro
Date: Mon,  7 Mar 2022 21:53:02 +0100	[thread overview]
Message-ID: <20220307205310.1905628-6-heiko@sntech.de> (raw)
In-Reply-To: <20220307205310.1905628-1-heiko@sntech.de>

When the alternatives were added the commit already provided a template
on how to implement 2 different alternatives for one piece of code.

Make this usable.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/include/asm/alternative-macros.h | 52 +++++++++++++--------
 1 file changed, 32 insertions(+), 20 deletions(-)

diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
index 92da6b3920a3..baf649293288 100644
--- a/arch/riscv/include/asm/alternative-macros.h
+++ b/arch/riscv/include/asm/alternative-macros.h
@@ -37,6 +37,20 @@
 #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
 	__ALTERNATIVE_CFG old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k)
 
+.macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
+				  new_c_2, vendor_id_2, errata_id_2, enable_2
+886 :
+	\old_c
+887 :
+	ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
+	ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
+.endm
+
+#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
+				  new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
+	__ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \
+				   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2)
+
 #else /* !__ASSEMBLY__ */
 
 #include <asm/asm.h>
@@ -72,6 +86,19 @@
 #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k)	\
 	__ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
 
+#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
+				  new_c_2, vendor_id_2, errata_id_2, enable_2) \
+	"886 :\n"	\
+	old_c "\n"	\
+	"887 :\n"	\
+	ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1) \
+	ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2)
+
+#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1,		\
+				  new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2)		\
+	__ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1),	\
+				   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2))
+
 #endif /* __ASSEMBLY__ */
 
 /*
@@ -96,25 +123,10 @@
  * this case, this vendor can create a new macro ALTERNATIVE_2() based
  * on the following sample code and then replace ALTERNATIVE() with
  * ALTERNATIVE_2() to append its customized content.
- *
- * .macro __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
- *                                   new_c_2, vendor_id_2, errata_id_2, enable_2
- * 886 :
- *      \old_c
- * 887 :
- *      ALT_NEW_CONTENT \vendor_id_1, \errata_id_1, \enable_1, \new_c_1
- *      ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2
- * .endm
- *
- * #define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
- *                                   new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
- *        __ALTERNATIVE_CFG_2 old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \
- *                                   new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2) \
- *
- * #define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
- *                                    new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
- *         _ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
- *                                         new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)
- *
  */
+#define ALTERNATIVE_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
+				   new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2) \
+	_ALTERNATIVE_CFG_2(old_content, new_content_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
+					new_content_2, vendor_id_2, errata_id_2, CONFIG_k_2)
+
 #endif
-- 
2.30.2


  parent reply	other threads:[~2022-03-07 20:53 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-07 20:52 [PATCH v7 00/13] riscv: support for Svpbmt and D1 memory types Heiko Stuebner
2022-03-07 20:52 ` Heiko Stuebner
2022-03-07 20:52 ` [PATCH v7 01/13] riscv: prevent null-pointer dereference with sbi_remote_fence_i Heiko Stuebner
2022-03-07 20:52   ` Heiko Stuebner
2022-03-07 20:52 ` [PATCH v7 02/13] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-03-07 20:52   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 03/13] riscv: allow different stages with alternatives Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 04/13] riscv: implement module alternatives Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner [this message]
2022-03-07 20:53   ` [PATCH v7 05/13] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 06/13] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 07/13] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 08/13] riscv: move boot alternatives to after fill_hwcap Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 09/13] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 10/13] riscv: add cpufeature handling via alternatives Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 11/13] riscv: add RISC-V Svpbmt extension support Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 12/13] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 13/13] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-03-07 20:53   ` Heiko Stuebner
2022-03-08  0:47 ` [PATCH v7 00/13] riscv: support for Svpbmt and D1 memory types Palmer Dabbelt
2022-03-08  0:47   ` Palmer Dabbelt
2022-03-08 11:56   ` Heiko Stübner
2022-03-08 11:56     ` Heiko Stübner
2022-03-09 22:06     ` Heiko Stübner
2022-03-09 22:06       ` Heiko Stübner
2022-03-18  3:40       ` Palmer Dabbelt
2022-03-18  3:40         ` Palmer Dabbelt
2022-03-18 16:22         ` Heiko Stübner
2022-03-18 16:22           ` Heiko Stübner
2022-03-18 21:50           ` Palmer Dabbelt
2022-03-18 21:50             ` Palmer Dabbelt
2022-03-22 16:09             ` Heiko Stübner
2022-03-22 16:09               ` Heiko Stübner
2022-03-22 20:25               ` Palmer Dabbelt
2022-03-22 20:25                 ` Palmer Dabbelt

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