From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr,
allen.baum@esperantotech.com, jscheid@ventanamicro.com,
rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH v7 06/13] riscv: extend concatenated alternatives-lines to the same length
Date: Mon, 7 Mar 2022 21:53:03 +0100 [thread overview]
Message-ID: <20220307205310.1905628-7-heiko@sntech.de> (raw)
In-Reply-To: <20220307205310.1905628-1-heiko@sntech.de>
ALT_NEW_CONTENT already uses same-length assembler lines, so
extend this to the other elements as well.
This makes it more readable when these elements need to be extended
in the future.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/riscv/include/asm/alternative-macros.h | 30 ++++++++++-----------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
index baf649293288..c0fb11fad631 100644
--- a/arch/riscv/include/asm/alternative-macros.h
+++ b/arch/riscv/include/asm/alternative-macros.h
@@ -56,14 +56,14 @@
#include <asm/asm.h>
#include <linux/stringify.h>
-#define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \
- RISCV_PTR " " oldptr "\n" \
- RISCV_PTR " " newptr "\n" \
- REG_ASM " " vendor_id "\n" \
- REG_ASM " " newlen "\n" \
+#define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \
+ RISCV_PTR " " oldptr "\n" \
+ RISCV_PTR " " newptr "\n" \
+ REG_ASM " " vendor_id "\n" \
+ REG_ASM " " newlen "\n" \
".word " errata_id "\n"
-#define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \
+#define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \
".if " __stringify(enable) " == 1\n" \
".pushsection .alternative, \"a\"\n" \
ALT_ENTRY("886b", "888f", __stringify(vendor_id), __stringify(errata_id), "889f - 888f") \
@@ -77,21 +77,21 @@
".org . - (889b - 888b) + (887b - 886b)\n" \
".endif\n"
-#define __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, enable) \
- "886 :\n" \
- old_c "\n" \
- "887 :\n" \
+#define __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, enable) \
+ "886 :\n" \
+ old_c "\n" \
+ "887 :\n" \
ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c)
-#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
+#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
__ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
new_c_2, vendor_id_2, errata_id_2, enable_2) \
- "886 :\n" \
- old_c "\n" \
- "887 :\n" \
- ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1) \
+ "886 :\n" \
+ old_c "\n" \
+ "887 :\n" \
+ ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1) \
ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2)
#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
--
2.30.2
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WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr,
allen.baum@esperantotech.com, jscheid@ventanamicro.com,
rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH v7 06/13] riscv: extend concatenated alternatives-lines to the same length
Date: Mon, 7 Mar 2022 21:53:03 +0100 [thread overview]
Message-ID: <20220307205310.1905628-7-heiko@sntech.de> (raw)
In-Reply-To: <20220307205310.1905628-1-heiko@sntech.de>
ALT_NEW_CONTENT already uses same-length assembler lines, so
extend this to the other elements as well.
This makes it more readable when these elements need to be extended
in the future.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/riscv/include/asm/alternative-macros.h | 30 ++++++++++-----------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
index baf649293288..c0fb11fad631 100644
--- a/arch/riscv/include/asm/alternative-macros.h
+++ b/arch/riscv/include/asm/alternative-macros.h
@@ -56,14 +56,14 @@
#include <asm/asm.h>
#include <linux/stringify.h>
-#define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \
- RISCV_PTR " " oldptr "\n" \
- RISCV_PTR " " newptr "\n" \
- REG_ASM " " vendor_id "\n" \
- REG_ASM " " newlen "\n" \
+#define ALT_ENTRY(oldptr, newptr, vendor_id, errata_id, newlen) \
+ RISCV_PTR " " oldptr "\n" \
+ RISCV_PTR " " newptr "\n" \
+ REG_ASM " " vendor_id "\n" \
+ REG_ASM " " newlen "\n" \
".word " errata_id "\n"
-#define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \
+#define ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c) \
".if " __stringify(enable) " == 1\n" \
".pushsection .alternative, \"a\"\n" \
ALT_ENTRY("886b", "888f", __stringify(vendor_id), __stringify(errata_id), "889f - 888f") \
@@ -77,21 +77,21 @@
".org . - (889b - 888b) + (887b - 886b)\n" \
".endif\n"
-#define __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, enable) \
- "886 :\n" \
- old_c "\n" \
- "887 :\n" \
+#define __ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, enable) \
+ "886 :\n" \
+ old_c "\n" \
+ "887 :\n" \
ALT_NEW_CONTENT(vendor_id, errata_id, enable, new_c)
-#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
+#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
__ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, IS_ENABLED(CONFIG_k))
#define __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \
new_c_2, vendor_id_2, errata_id_2, enable_2) \
- "886 :\n" \
- old_c "\n" \
- "887 :\n" \
- ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1) \
+ "886 :\n" \
+ old_c "\n" \
+ "887 :\n" \
+ ALT_NEW_CONTENT(vendor_id_1, errata_id_1, enable_1, new_c_1) \
ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2)
#define _ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \
--
2.30.2
next prev parent reply other threads:[~2022-03-07 20:53 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 20:52 [PATCH v7 00/13] riscv: support for Svpbmt and D1 memory types Heiko Stuebner
2022-03-07 20:52 ` Heiko Stuebner
2022-03-07 20:52 ` [PATCH v7 01/13] riscv: prevent null-pointer dereference with sbi_remote_fence_i Heiko Stuebner
2022-03-07 20:52 ` Heiko Stuebner
2022-03-07 20:52 ` [PATCH v7 02/13] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-03-07 20:52 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 03/13] riscv: allow different stages with alternatives Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 04/13] riscv: implement module alternatives Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 05/13] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner [this message]
2022-03-07 20:53 ` [PATCH v7 06/13] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 07/13] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 08/13] riscv: move boot alternatives to after fill_hwcap Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 09/13] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 10/13] riscv: add cpufeature handling via alternatives Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 11/13] riscv: add RISC-V Svpbmt extension support Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 12/13] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-07 20:53 ` [PATCH v7 13/13] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-03-07 20:53 ` Heiko Stuebner
2022-03-08 0:47 ` [PATCH v7 00/13] riscv: support for Svpbmt and D1 memory types Palmer Dabbelt
2022-03-08 0:47 ` Palmer Dabbelt
2022-03-08 11:56 ` Heiko Stübner
2022-03-08 11:56 ` Heiko Stübner
2022-03-09 22:06 ` Heiko Stübner
2022-03-09 22:06 ` Heiko Stübner
2022-03-18 3:40 ` Palmer Dabbelt
2022-03-18 3:40 ` Palmer Dabbelt
2022-03-18 16:22 ` Heiko Stübner
2022-03-18 16:22 ` Heiko Stübner
2022-03-18 21:50 ` Palmer Dabbelt
2022-03-18 21:50 ` Palmer Dabbelt
2022-03-22 16:09 ` Heiko Stübner
2022-03-22 16:09 ` Heiko Stübner
2022-03-22 20:25 ` Palmer Dabbelt
2022-03-22 20:25 ` Palmer Dabbelt
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