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From: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
To: Palmer Dabbelt <palmer@rivosinc.com>
Cc: linux-sparse@vger.kernel.org, Kito Cheng <kito.cheng@gmail.com>,
	linux-riscv@lists.infradead.org, mkl@pengutronix.de,
	aurelien@aurel32.net,
	Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH v1 3/6] RISC-V: Remove the unimplemented ISA extensions
Date: Sun, 22 May 2022 00:05:32 +0200	[thread overview]
Message-ID: <20220521220532.yfpmrdbvu2gyv2rc@mail> (raw)
In-Reply-To: <20220402050041.21302-4-palmer@rivosinc.com>

On Fri, Apr 01, 2022 at 10:00:38PM -0700, Palmer Dabbelt wrote:
> This made sense when we die()d on unknown ISA extensions, but now that
> we're just warning it's actually a bit detrimental: users won't see that
> their unimplemented ISA extensions are silently having the wrong
> definitions set, which may cause hard to debug failures.
> 
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  target-riscv.c | 10 ----------
>  1 file changed, 10 deletions(-)
> 
> diff --git a/target-riscv.c b/target-riscv.c
> index 494c08db..924259af 100644
> --- a/target-riscv.c
> +++ b/target-riscv.c
> @@ -37,17 +37,7 @@ static void parse_march_riscv(const char *arg)
>  		{ "f",		RISCV_FLOAT|RISCV_FDIV },
>  		{ "d",		RISCV_DOUBLE|RISCV_FDIV },
>  		{ "g",		RISCV_GENERIC },
> -		{ "q",		0 },
> -		{ "l",		0 },
>  		{ "c",		RISCV_COMP },
> -		{ "b",		0 },
> -		{ "j",		0 },
> -		{ "t",		0 },
> -		{ "p",		0 },
> -		{ "v",		0 },
> -		{ "n",		0 },
> -		{ "h",		0 },
> -		{ "s",		0 },

OK, it seems than most of them have anyway no chances to be officialized
anytime soon. Maybe just add the define for p & v together with
the Zb* ones when switching __riscv_arch_test).

-- Luc


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linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
To: Palmer Dabbelt <palmer@rivosinc.com>
Cc: linux-sparse@vger.kernel.org, Kito Cheng <kito.cheng@gmail.com>,
	linux-riscv@lists.infradead.org, mkl@pengutronix.de,
	aurelien@aurel32.net,
	Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH v1 3/6] RISC-V: Remove the unimplemented ISA extensions
Date: Sun, 22 May 2022 00:05:32 +0200	[thread overview]
Message-ID: <20220521220532.yfpmrdbvu2gyv2rc@mail> (raw)
In-Reply-To: <20220402050041.21302-4-palmer@rivosinc.com>

On Fri, Apr 01, 2022 at 10:00:38PM -0700, Palmer Dabbelt wrote:
> This made sense when we die()d on unknown ISA extensions, but now that
> we're just warning it's actually a bit detrimental: users won't see that
> their unimplemented ISA extensions are silently having the wrong
> definitions set, which may cause hard to debug failures.
> 
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  target-riscv.c | 10 ----------
>  1 file changed, 10 deletions(-)
> 
> diff --git a/target-riscv.c b/target-riscv.c
> index 494c08db..924259af 100644
> --- a/target-riscv.c
> +++ b/target-riscv.c
> @@ -37,17 +37,7 @@ static void parse_march_riscv(const char *arg)
>  		{ "f",		RISCV_FLOAT|RISCV_FDIV },
>  		{ "d",		RISCV_DOUBLE|RISCV_FDIV },
>  		{ "g",		RISCV_GENERIC },
> -		{ "q",		0 },
> -		{ "l",		0 },
>  		{ "c",		RISCV_COMP },
> -		{ "b",		0 },
> -		{ "j",		0 },
> -		{ "t",		0 },
> -		{ "p",		0 },
> -		{ "v",		0 },
> -		{ "n",		0 },
> -		{ "h",		0 },
> -		{ "s",		0 },

OK, it seems than most of them have anyway no chances to be officialized
anytime soon. Maybe just add the define for p & v together with
the Zb* ones when switching __riscv_arch_test).

-- Luc


  reply	other threads:[~2022-05-21 22:05 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-02  5:00 [PATCH v1 0/6] RISC-V -march handling improvements Palmer Dabbelt
2022-04-02  5:00 ` Palmer Dabbelt
2022-04-02  5:00 ` [PATCH v1 1/6] RISC-V: Respect -Wsparse-error for -march errors Palmer Dabbelt
2022-04-02  5:00   ` Palmer Dabbelt
2022-05-21 21:46   ` Luc Van Oostenryck
2022-05-21 21:46     ` Luc Van Oostenryck
2022-04-02  5:00 ` [PATCH v1 2/6] RISC-V: Match GCC's semantics for multiple -march instances Palmer Dabbelt
2022-04-02  5:00   ` Palmer Dabbelt
2022-05-21 21:52   ` Luc Van Oostenryck
2022-05-21 21:52     ` Luc Van Oostenryck
2022-04-02  5:00 ` [PATCH v1 3/6] RISC-V: Remove the unimplemented ISA extensions Palmer Dabbelt
2022-04-02  5:00   ` Palmer Dabbelt
2022-05-21 22:05   ` Luc Van Oostenryck [this message]
2022-05-21 22:05     ` Luc Van Oostenryck
2022-04-02  5:00 ` [PATCH v1 4/6] RISC-V: Remove "g" from the extension list Palmer Dabbelt
2022-04-02  5:00   ` Palmer Dabbelt
2022-04-02  5:00 ` [PATCH v1 5/6] RISC-V: Add the Zicsr extension Palmer Dabbelt
2022-04-02  5:00   ` Palmer Dabbelt
2022-04-02  5:00 ` [PATCH v1 6/6] RISC-V: Add the Zifencei extension Palmer Dabbelt
2022-04-02  5:00   ` Palmer Dabbelt
2022-04-04 17:52 ` [PATCH v1 0/6] RISC-V -march handling improvements Marc Kleine-Budde
2022-04-04 17:52   ` Marc Kleine-Budde
2022-04-04 23:15   ` Palmer Dabbelt
2022-04-04 23:15     ` Palmer Dabbelt
2022-05-21 21:23 ` Luc Van Oostenryck
2022-05-21 21:23   ` Luc Van Oostenryck
2022-07-05 23:09   ` Palmer Dabbelt
2022-07-05 23:09     ` Palmer Dabbelt

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