From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Ira Weiny <ira.weiny@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"Li, Ming" <ming4.li@intel.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Matthew Wilcox <willy@infradead.org>,
Lukas Wunner <lukas@wunner.de>,
Alison Schofield <alison.schofield@intel.com>,
"Vishal Verma" <vishal.l.verma@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
"Ben Widawsky" <bwidawsk@kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
<linux-pci@vger.kernel.org>
Subject: Re: [PATCH V14 3/7] PCI/DOE: Add DOE mailbox support functions
Date: Wed, 20 Jul 2022 12:24:23 +0100 [thread overview]
Message-ID: <20220720122423.00004ea6@Huawei.com> (raw)
In-Reply-To: <YtcC9qYo1lOGZ/83@iweiny-desk3>
On Tue, 19 Jul 2022 12:16:06 -0700
Ira Weiny <ira.weiny@intel.com> wrote:
> On Tue, Jul 19, 2022 at 05:35:53PM +0100, Jonathan Cameron wrote:
> > On Thu, 14 Jul 2022 20:04:20 -0700
> > ira.weiny@intel.com wrote:
> >
> > > From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > >
> > > Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based
> > > mailbox with standard protocol discovery. Each mailbox is accessed
> > > through a DOE Extended Capability.
> > >
> > > Each DOE mailbox must support the DOE discovery protocol in addition to
> > > any number of additional protocols.
> > >
> > > Define core PCIe functionality to manage a single PCIe DOE mailbox at a
> > > defined config space offset. Functionality includes iterating,
> > > creating, query of supported protocol, and task submission. Destruction
> > > of the mailboxes is device managed.
> > >
> > > Cc: "Li, Ming" <ming4.li@intel.com>
> > > Cc: Bjorn Helgaas <helgaas@kernel.org>
> > > Cc: Matthew Wilcox <willy@infradead.org>
> > > Acked-by: Bjorn Helgaas <helgaas@kernel.org>
> > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > > Co-developed-by: Ira Weiny <ira.weiny@intel.com>
> > > Signed-off-by: Ira Weiny <ira.weiny@intel.com>
> > Hi Ira,
> >
> > Thanks for persisting with this!
> >
> > So, I think this works, but there is at least one 'sleep' I can't
> > see a purpose for. I think it's just a left over from refactoring.
> >
> > A few other more trivial things inline.
> >
> > Thanks,
> >
> > Jonathan
> >
> >
> > >
> > >> # Endpoint library must be initialized before its users
> > > obj-$(CONFIG_PCI_ENDPOINT) += endpoint/
> > > diff --git a/drivers/pci/doe.c b/drivers/pci/doe.c
> > > new file mode 100644
> > > index 000000000000..12c3762be22f
> > > --- /dev/null
> > > +++ b/drivers/pci/doe.c
> > > @@ -0,0 +1,546 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Data Object Exchange
> > > + * PCIe r6.0, sec 6.30 DOE
> > > + *
> > > + * Copyright (C) 2021 Huawei
> > > + * Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > > + *
> > > + * Copyright (C) 2022 Intel Corporation
> > > + * Ira Weiny <ira.weiny@intel.com>
> > > + */
> > > +
> > > +#define dev_fmt(fmt) "DOE: " fmt
> > > +
> > > +#include <linux/bitfield.h>
> > > +#include <linux/delay.h>
> > > +#include <linux/jiffies.h>
> > > +#include <linux/mutex.h>
> > > +#include <linux/pci.h>
> > > +#include <linux/pci-doe.h>
> > > +#include <linux/workqueue.h>
> > > +
> > > +#define PCI_DOE_PROTOCOL_DISCOVERY 0
> > > +
> > > +#define PCI_DOE_BUSY_MAX_RETRIES 16
> > Left over from removed code.
>
> I think Dan may have taken these. If so I'll send a clean up. If not I can
> spin. Let me check.
>
Absolutely. All tiny improvements, so fine to go in next cycle given late timing.
> > > +/**
> > > + * pci_doe_supports_prot() - Return if the DOE instance supports the given
> > > + * protocol
> > > + * @doe_mb: DOE mailbox capability to query
> > > + * @vid: Protocol Vendor ID
> > > + * @type: Protocol type
> > > + *
> > > + * RETURNS: True if the DOE mailbox supports the protocol specified
> > > + */
> > > +bool pci_doe_supports_prot(struct pci_doe_mb *doe_mb, u16 vid, u8 type)
> > > +{
> > > + unsigned long index;
> > > + void *entry;
> > > +
> > > + /* The discovery protocol must always be supported */
> > > + if (vid == PCI_VENDOR_ID_PCI_SIG && type == PCI_DOE_PROTOCOL_DISCOVERY)
> > > + return true;
> >
> > Given how cheap this look up is now it's all in xarray, we could drop this
> > 'optimization'. I'm fairly sure the discovery protocol will always be
> > discovered (spec says it must be returned when calling itself as the fist
> > protocol).
>
> No we can't because this is called before the xarray is populated with the
> discovery protocol. This was actually added not as an optimization but to
> allow the discovery protocol to run through the common query path.
>
Ah. I was too lazy to check if that was the case :)
Jonathan
next prev parent reply other threads:[~2022-07-20 11:24 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 3:04 [PATCH V14 0/7] CXL: Read CDAT ira.weiny
2022-07-15 3:04 ` [PATCH V14 1/7] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-07-15 3:04 ` [PATCH V14 2/7] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-07-15 3:04 ` [PATCH V14 3/7] PCI/DOE: Add DOE mailbox support functions ira.weiny
2022-07-19 16:35 ` Jonathan Cameron
2022-07-19 19:16 ` Ira Weiny
2022-07-19 19:50 ` Ira Weiny
2022-07-20 11:24 ` Jonathan Cameron [this message]
2022-07-15 3:04 ` [PATCH V14 4/7] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-07-19 16:38 ` Jonathan Cameron
2022-07-15 3:04 ` [PATCH V14 5/7] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} ira.weiny
2022-07-19 16:39 ` Jonathan Cameron
2022-07-15 3:04 ` [PATCH V14 6/7] cxl/port: Read CDAT table ira.weiny
2022-07-16 3:27 ` Dan Williams
2022-07-19 1:19 ` Dan Williams
2022-07-19 1:55 ` [PATCH v15 " Dan Williams
2022-07-19 16:46 ` Jonathan Cameron
2022-07-19 19:26 ` Dan Williams
2022-07-15 3:04 ` [PATCH V14 7/7] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-07-16 2:26 ` Dan Williams
2022-07-19 16:47 ` Jonathan Cameron
2022-07-19 15:21 ` [PATCH V14 0/7] CXL: Read CDAT Jonathan Cameron
2022-07-19 19:23 ` Dan Williams
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