From: Anup Patel <apatel@ventanamicro.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Jones <ajones@ventanamicro.com>,
Atish Patra <atishp@atishpatra.org>,
Samuel Holland <samuel@sholland.org>,
Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 2/2] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT property
Date: Wed, 27 Jul 2022 17:13:02 +0530 [thread overview]
Message-ID: <20220727114302.302201-3-apatel@ventanamicro.com> (raw)
In-Reply-To: <20220727114302.302201-1-apatel@ventanamicro.com>
We should set CLOCK_EVT_FEAT_C3STOP for a clock_event_device only when
riscv,timer-can-wake-cpu DT property is not present for the corresponding
CPU.
This way CLOCK_EVT_FEAT_C3STOP feature is set for clock_event_device
based on RISC-V platform capabilities rather than having it set for
all RISC-V platforms.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/clocksource/timer-riscv.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index 593d5a957b69..92a0b9832d8c 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta,
static unsigned int riscv_clock_event_irq;
static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
.name = "riscv_timer_clockevent",
- .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
+ .features = CLOCK_EVT_FEAT_ONESHOT,
.rating = 100,
.set_next_event = riscv_clock_next_event,
};
@@ -65,9 +65,13 @@ static struct clocksource riscv_clocksource = {
static int riscv_timer_starting_cpu(unsigned int cpu)
{
struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu);
+ struct device_node *np = of_get_cpu_node(cpu, NULL);
ce->cpumask = cpumask_of(cpu);
ce->irq = riscv_clock_event_irq;
+ if (!of_property_read_bool(np, "riscv,timer-can-wake-cpu"))
+ ce->features |= CLOCK_EVT_FEAT_C3STOP;
+ of_node_put(np);
clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
enable_percpu_irq(riscv_clock_event_irq,
--
2.34.1
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WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Jones <ajones@ventanamicro.com>,
Atish Patra <atishp@atishpatra.org>,
Samuel Holland <samuel@sholland.org>,
Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 2/2] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT property
Date: Wed, 27 Jul 2022 17:13:02 +0530 [thread overview]
Message-ID: <20220727114302.302201-3-apatel@ventanamicro.com> (raw)
In-Reply-To: <20220727114302.302201-1-apatel@ventanamicro.com>
We should set CLOCK_EVT_FEAT_C3STOP for a clock_event_device only when
riscv,timer-can-wake-cpu DT property is not present for the corresponding
CPU.
This way CLOCK_EVT_FEAT_C3STOP feature is set for clock_event_device
based on RISC-V platform capabilities rather than having it set for
all RISC-V platforms.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/clocksource/timer-riscv.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index 593d5a957b69..92a0b9832d8c 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta,
static unsigned int riscv_clock_event_irq;
static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
.name = "riscv_timer_clockevent",
- .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
+ .features = CLOCK_EVT_FEAT_ONESHOT,
.rating = 100,
.set_next_event = riscv_clock_next_event,
};
@@ -65,9 +65,13 @@ static struct clocksource riscv_clocksource = {
static int riscv_timer_starting_cpu(unsigned int cpu)
{
struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu);
+ struct device_node *np = of_get_cpu_node(cpu, NULL);
ce->cpumask = cpumask_of(cpu);
ce->irq = riscv_clock_event_irq;
+ if (!of_property_read_bool(np, "riscv,timer-can-wake-cpu"))
+ ce->features |= CLOCK_EVT_FEAT_C3STOP;
+ of_node_put(np);
clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
enable_percpu_irq(riscv_clock_event_irq,
--
2.34.1
next prev parent reply other threads:[~2022-07-27 11:44 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-27 11:43 [PATCH v2 0/2] Improve CLOCK_EVT_FEAT_C3STOP feature setting Anup Patel
2022-07-27 11:43 ` Anup Patel
2022-07-27 11:43 ` [PATCH v2 1/2] dt-bindings: riscv: Add optional DT property riscv,timer-can-wake-cpu Anup Patel
2022-07-27 11:43 ` Anup Patel
2022-07-27 12:07 ` Krzysztof Kozlowski
2022-07-27 12:07 ` Krzysztof Kozlowski
2022-07-27 12:21 ` Anup Patel
2022-07-27 12:21 ` Anup Patel
2022-07-27 12:35 ` Krzysztof Kozlowski
2022-07-27 12:35 ` Krzysztof Kozlowski
2022-07-27 13:34 ` Anup Patel
2022-07-27 13:34 ` Anup Patel
2022-11-22 14:57 ` Conor Dooley
2022-11-22 14:57 ` Conor Dooley
2022-11-23 5:43 ` Samuel Holland
2022-11-23 5:43 ` Samuel Holland
2022-11-23 11:49 ` Conor Dooley
2022-11-23 11:49 ` Conor Dooley
2022-11-23 13:46 ` Conor Dooley
2022-11-23 13:46 ` Conor Dooley
2022-11-23 15:46 ` Anup Patel
2022-11-23 15:46 ` Anup Patel
2022-11-23 17:59 ` Conor Dooley
2022-11-23 17:59 ` Conor Dooley
2022-07-27 12:45 ` Sudeep Holla
2022-07-27 12:45 ` Sudeep Holla
2022-07-27 13:19 ` Anup Patel
2022-07-27 13:19 ` Anup Patel
2022-07-27 13:45 ` Anup Patel
2022-07-27 13:45 ` Anup Patel
2022-07-27 15:26 ` Sudeep Holla
2022-07-27 15:26 ` Sudeep Holla
2022-07-27 12:18 ` Sudeep Holla
2022-07-27 12:18 ` Sudeep Holla
2022-07-27 12:29 ` Anup Patel
2022-07-27 12:29 ` Anup Patel
2022-07-27 11:43 ` Anup Patel [this message]
2022-07-27 11:43 ` [PATCH v2 2/2] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT property Anup Patel
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