From: Bard Liao <yung-chuan.liao@linux.intel.com>
To: alsa-devel@alsa-project.org, vkoul@kernel.org
Cc: pierre-louis.bossart@linux.intel.com, vinod.koul@linaro.org,
bard.liao@intel.com, linux-kernel@vger.kernel.org
Subject: [PATCH 02/11] soundwire: intel: regroup definitions for LCTL
Date: Tue, 23 Aug 2022 13:38:37 +0800 [thread overview]
Message-ID: <20220823053846.2684635-3-yung-chuan.liao@linux.intel.com> (raw)
In-Reply-To: <20220823053846.2684635-1-yung-chuan.liao@linux.intel.com>
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
No functionality change, just regroup offset and bitfield definitions.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
include/linux/soundwire/sdw_intel.h | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 49a3c265529b..d9f51f43e42c 100644
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -19,7 +19,14 @@
#define SDW_SHIM_LCAP 0x0
#define SDW_SHIM_LCAP_LCOUNT_MASK GENMASK(2, 0)
+/* LCTL */
#define SDW_SHIM_LCTL 0x4
+
+#define SDW_SHIM_LCTL_SPA BIT(0)
+#define SDW_SHIM_LCTL_SPA_MASK GENMASK(3, 0)
+#define SDW_SHIM_LCTL_CPA BIT(8)
+#define SDW_SHIM_LCTL_CPA_MASK GENMASK(11, 8)
+
#define SDW_SHIM_IPPTR 0x8
#define SDW_SHIM_SYNC 0xC
@@ -39,11 +46,6 @@
#define SDW_SHIM_WAKEEN 0x190
#define SDW_SHIM_WAKESTS 0x192
-#define SDW_SHIM_LCTL_SPA BIT(0)
-#define SDW_SHIM_LCTL_SPA_MASK GENMASK(3, 0)
-#define SDW_SHIM_LCTL_CPA BIT(8)
-#define SDW_SHIM_LCTL_CPA_MASK GENMASK(11, 8)
-
#define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
#define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
#define SDW_SHIM_SYNC_SYNCPRD GENMASK(14, 0)
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Bard Liao <yung-chuan.liao@linux.intel.com>
To: alsa-devel@alsa-project.org, vkoul@kernel.org
Cc: vinod.koul@linaro.org, linux-kernel@vger.kernel.org,
pierre-louis.bossart@linux.intel.com, bard.liao@intel.com
Subject: [PATCH 02/11] soundwire: intel: regroup definitions for LCTL
Date: Tue, 23 Aug 2022 13:38:37 +0800 [thread overview]
Message-ID: <20220823053846.2684635-3-yung-chuan.liao@linux.intel.com> (raw)
In-Reply-To: <20220823053846.2684635-1-yung-chuan.liao@linux.intel.com>
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
No functionality change, just regroup offset and bitfield definitions.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
include/linux/soundwire/sdw_intel.h | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 49a3c265529b..d9f51f43e42c 100644
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -19,7 +19,14 @@
#define SDW_SHIM_LCAP 0x0
#define SDW_SHIM_LCAP_LCOUNT_MASK GENMASK(2, 0)
+/* LCTL */
#define SDW_SHIM_LCTL 0x4
+
+#define SDW_SHIM_LCTL_SPA BIT(0)
+#define SDW_SHIM_LCTL_SPA_MASK GENMASK(3, 0)
+#define SDW_SHIM_LCTL_CPA BIT(8)
+#define SDW_SHIM_LCTL_CPA_MASK GENMASK(11, 8)
+
#define SDW_SHIM_IPPTR 0x8
#define SDW_SHIM_SYNC 0xC
@@ -39,11 +46,6 @@
#define SDW_SHIM_WAKEEN 0x190
#define SDW_SHIM_WAKESTS 0x192
-#define SDW_SHIM_LCTL_SPA BIT(0)
-#define SDW_SHIM_LCTL_SPA_MASK GENMASK(3, 0)
-#define SDW_SHIM_LCTL_CPA BIT(8)
-#define SDW_SHIM_LCTL_CPA_MASK GENMASK(11, 8)
-
#define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
#define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
#define SDW_SHIM_SYNC_SYNCPRD GENMASK(14, 0)
--
2.25.1
next prev parent reply other threads:[~2022-08-23 5:37 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-23 5:38 [PATCH 00/11] soundwire: register cleanups Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 01/11] soundwire: intel: cleanup definition of LCOUNT Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` Bard Liao [this message]
2022-08-23 5:38 ` [PATCH 02/11] soundwire: intel: regroup definitions for LCTL Bard Liao
2022-08-23 5:38 ` [PATCH 03/11] soundwire: intel: remove IPPTR unused definition Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 04/11] soundwire: intel: cleanup SHIM SYNC Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 05/11] soundwire: intel: remove unused PDM capabilities Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 06/11] soundwire: intel: add comment for control stream cap/chmap Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 07/11] soundwire: intel: cleanup PCM stream capabilities Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 08/11] soundwire: intel: cleanup PCM Stream channel map and channel count Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 09/11] soundwire: intel: cleanup IO control Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 10/11] soundwire: intel: cleanup AC Timing Control Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 11/11] soundwire: intel: cleanup WakeEnable and WakeStatus Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-30 4:49 ` [PATCH 00/11] soundwire: register cleanups Vinod Koul
2022-08-30 4:49 ` Vinod Koul
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