From: Bard Liao <yung-chuan.liao@linux.intel.com>
To: alsa-devel@alsa-project.org, vkoul@kernel.org
Cc: pierre-louis.bossart@linux.intel.com, vinod.koul@linaro.org,
bard.liao@intel.com, linux-kernel@vger.kernel.org
Subject: [PATCH 04/11] soundwire: intel: cleanup SHIM SYNC
Date: Tue, 23 Aug 2022 13:38:39 +0800 [thread overview]
Message-ID: <20220823053846.2684635-5-yung-chuan.liao@linux.intel.com> (raw)
In-Reply-To: <20220823053846.2684635-1-yung-chuan.liao@linux.intel.com>
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Regroup offset and bitfields, no functionality change
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
include/linux/soundwire/sdw_intel.h | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 581a9ba32f82..66503cf29f48 100644
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -27,8 +27,17 @@
#define SDW_SHIM_LCTL_CPA BIT(8)
#define SDW_SHIM_LCTL_CPA_MASK GENMASK(11, 8)
+/* SYNC */
#define SDW_SHIM_SYNC 0xC
+#define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
+#define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
+#define SDW_SHIM_SYNC_SYNCPRD GENMASK(14, 0)
+#define SDW_SHIM_SYNC_SYNCCPU BIT(15)
+#define SDW_SHIM_SYNC_CMDSYNC_MASK GENMASK(19, 16)
+#define SDW_SHIM_SYNC_CMDSYNC BIT(16)
+#define SDW_SHIM_SYNC_SYNCGO BIT(24)
+
#define SDW_SHIM_CTLSCAP(x) (0x010 + 0x60 * (x))
#define SDW_SHIM_CTLS0CM(x) (0x012 + 0x60 * (x))
#define SDW_SHIM_CTLS1CM(x) (0x014 + 0x60 * (x))
@@ -45,14 +54,6 @@
#define SDW_SHIM_WAKEEN 0x190
#define SDW_SHIM_WAKESTS 0x192
-#define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
-#define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
-#define SDW_SHIM_SYNC_SYNCPRD GENMASK(14, 0)
-#define SDW_SHIM_SYNC_SYNCCPU BIT(15)
-#define SDW_SHIM_SYNC_CMDSYNC_MASK GENMASK(19, 16)
-#define SDW_SHIM_SYNC_CMDSYNC BIT(16)
-#define SDW_SHIM_SYNC_SYNCGO BIT(24)
-
#define SDW_SHIM_PCMSCAP_ISS GENMASK(3, 0)
#define SDW_SHIM_PCMSCAP_OSS GENMASK(7, 4)
#define SDW_SHIM_PCMSCAP_BSS GENMASK(12, 8)
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Bard Liao <yung-chuan.liao@linux.intel.com>
To: alsa-devel@alsa-project.org, vkoul@kernel.org
Cc: vinod.koul@linaro.org, linux-kernel@vger.kernel.org,
pierre-louis.bossart@linux.intel.com, bard.liao@intel.com
Subject: [PATCH 04/11] soundwire: intel: cleanup SHIM SYNC
Date: Tue, 23 Aug 2022 13:38:39 +0800 [thread overview]
Message-ID: <20220823053846.2684635-5-yung-chuan.liao@linux.intel.com> (raw)
In-Reply-To: <20220823053846.2684635-1-yung-chuan.liao@linux.intel.com>
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Regroup offset and bitfields, no functionality change
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
include/linux/soundwire/sdw_intel.h | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/include/linux/soundwire/sdw_intel.h b/include/linux/soundwire/sdw_intel.h
index 581a9ba32f82..66503cf29f48 100644
--- a/include/linux/soundwire/sdw_intel.h
+++ b/include/linux/soundwire/sdw_intel.h
@@ -27,8 +27,17 @@
#define SDW_SHIM_LCTL_CPA BIT(8)
#define SDW_SHIM_LCTL_CPA_MASK GENMASK(11, 8)
+/* SYNC */
#define SDW_SHIM_SYNC 0xC
+#define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
+#define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
+#define SDW_SHIM_SYNC_SYNCPRD GENMASK(14, 0)
+#define SDW_SHIM_SYNC_SYNCCPU BIT(15)
+#define SDW_SHIM_SYNC_CMDSYNC_MASK GENMASK(19, 16)
+#define SDW_SHIM_SYNC_CMDSYNC BIT(16)
+#define SDW_SHIM_SYNC_SYNCGO BIT(24)
+
#define SDW_SHIM_CTLSCAP(x) (0x010 + 0x60 * (x))
#define SDW_SHIM_CTLS0CM(x) (0x012 + 0x60 * (x))
#define SDW_SHIM_CTLS1CM(x) (0x014 + 0x60 * (x))
@@ -45,14 +54,6 @@
#define SDW_SHIM_WAKEEN 0x190
#define SDW_SHIM_WAKESTS 0x192
-#define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
-#define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
-#define SDW_SHIM_SYNC_SYNCPRD GENMASK(14, 0)
-#define SDW_SHIM_SYNC_SYNCCPU BIT(15)
-#define SDW_SHIM_SYNC_CMDSYNC_MASK GENMASK(19, 16)
-#define SDW_SHIM_SYNC_CMDSYNC BIT(16)
-#define SDW_SHIM_SYNC_SYNCGO BIT(24)
-
#define SDW_SHIM_PCMSCAP_ISS GENMASK(3, 0)
#define SDW_SHIM_PCMSCAP_OSS GENMASK(7, 4)
#define SDW_SHIM_PCMSCAP_BSS GENMASK(12, 8)
--
2.25.1
next prev parent reply other threads:[~2022-08-23 5:37 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-23 5:38 [PATCH 00/11] soundwire: register cleanups Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 01/11] soundwire: intel: cleanup definition of LCOUNT Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 02/11] soundwire: intel: regroup definitions for LCTL Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 03/11] soundwire: intel: remove IPPTR unused definition Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` Bard Liao [this message]
2022-08-23 5:38 ` [PATCH 04/11] soundwire: intel: cleanup SHIM SYNC Bard Liao
2022-08-23 5:38 ` [PATCH 05/11] soundwire: intel: remove unused PDM capabilities Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 06/11] soundwire: intel: add comment for control stream cap/chmap Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 07/11] soundwire: intel: cleanup PCM stream capabilities Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 08/11] soundwire: intel: cleanup PCM Stream channel map and channel count Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 09/11] soundwire: intel: cleanup IO control Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 10/11] soundwire: intel: cleanup AC Timing Control Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-23 5:38 ` [PATCH 11/11] soundwire: intel: cleanup WakeEnable and WakeStatus Bard Liao
2022-08-23 5:38 ` Bard Liao
2022-08-30 4:49 ` [PATCH 00/11] soundwire: register cleanups Vinod Koul
2022-08-30 4:49 ` Vinod Koul
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220823053846.2684635-5-yung-chuan.liao@linux.intel.com \
--to=yung-chuan.liao@linux.intel.com \
--cc=alsa-devel@alsa-project.org \
--cc=bard.liao@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=pierre-louis.bossart@linux.intel.com \
--cc=vinod.koul@linaro.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.