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From: Rob Herring <robh@kernel.org>
To: Zong Li <zong.li@sifive.com>
Cc: linux-riscv@lists.infradead.org, conor.dooley@microchip.com,
	palmer@dabbelt.com, krzysztof.kozlowski+dt@linaro.org,
	greentime.hu@sifive.com, robh+dt@kernel.org,
	linux-edac@vger.kernel.org, paul.walmsley@sifive.com,
	ben.dooks@sifive.com, linux-kernel@vger.kernel.org,
	aou@eecs.berkeley.edu, bp@alien8.de, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache
Date: Thu, 8 Sep 2022 16:21:02 -0500	[thread overview]
Message-ID: <20220908212102.GA3361862-robh@kernel.org> (raw)
In-Reply-To: <20220905083125.29426-2-zong.li@sifive.com>

On Mon, 05 Sep 2022 08:31:20 +0000, Zong Li wrote:
> Since composable cache may be L3 cache if private L2 cache exists, we
> should use its original name Composable cache to prevent confusion.
> 
> Signed-off-by: Zong Li <zong.li@sifive.com>
> Suggested-by: Conor Dooley <conor.dooley@microchip.com>
> Suggested-by: Ben Dooks <ben.dooks@sifive.com>
> ---
>  ...five-l2-cache.yaml => sifive,ccache0.yaml} | 28 +++++++++++++++----
>  1 file changed, 23 insertions(+), 5 deletions(-)
>  rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive,ccache0.yaml} (83%)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Zong Li <zong.li@sifive.com>
Cc: linux-riscv@lists.infradead.org, conor.dooley@microchip.com,
	palmer@dabbelt.com, krzysztof.kozlowski+dt@linaro.org,
	greentime.hu@sifive.com, robh+dt@kernel.org,
	linux-edac@vger.kernel.org, paul.walmsley@sifive.com,
	ben.dooks@sifive.com, linux-kernel@vger.kernel.org,
	aou@eecs.berkeley.edu, bp@alien8.de, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache
Date: Thu, 8 Sep 2022 16:21:02 -0500	[thread overview]
Message-ID: <20220908212102.GA3361862-robh@kernel.org> (raw)
In-Reply-To: <20220905083125.29426-2-zong.li@sifive.com>

On Mon, 05 Sep 2022 08:31:20 +0000, Zong Li wrote:
> Since composable cache may be L3 cache if private L2 cache exists, we
> should use its original name Composable cache to prevent confusion.
> 
> Signed-off-by: Zong Li <zong.li@sifive.com>
> Suggested-by: Conor Dooley <conor.dooley@microchip.com>
> Suggested-by: Ben Dooks <ben.dooks@sifive.com>
> ---
>  ...five-l2-cache.yaml => sifive,ccache0.yaml} | 28 +++++++++++++++----
>  1 file changed, 23 insertions(+), 5 deletions(-)
>  rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive,ccache0.yaml} (83%)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2022-09-08 21:21 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-05  8:31 [PATCH v2 0/6] Use composable cache instead of L2 cache Zong Li
2022-09-05  8:31 ` Zong Li
2022-09-05  8:31 ` [PATCH v2 1/6] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache Zong Li
2022-09-05  8:31   ` Zong Li
2022-09-05 18:02   ` Conor.Dooley
2022-09-05 18:02     ` Conor.Dooley
2022-09-08 21:21   ` Rob Herring [this message]
2022-09-08 21:21     ` Rob Herring
2022-09-08 21:32     ` Conor.Dooley
2022-09-08 21:32       ` Conor.Dooley
2022-09-05  8:31 ` [PATCH v2 2/6] soc: sifive: ccache: Rename SiFive " Zong Li
2022-09-05  8:31   ` Zong Li
2022-09-05 18:10   ` Conor.Dooley
2022-09-05 18:10     ` Conor.Dooley
2022-09-06  1:52     ` Zong Li
2022-09-06  1:52       ` Zong Li
2022-09-05 18:46   ` Conor.Dooley
2022-09-05 18:46     ` Conor.Dooley
2022-09-06  1:44     ` Zong Li
2022-09-06  1:44       ` Zong Li
2022-09-06  6:23       ` Conor.Dooley
2022-09-06  6:23         ` Conor.Dooley
2022-09-06  6:51         ` Zong Li
2022-09-06  6:51           ` Zong Li
2022-09-05  8:31 ` [PATCH v2 3/6] soc: sifive: ccache: determine the cache level from dts Zong Li
2022-09-05  8:31   ` Zong Li
2022-09-05 18:14   ` Conor.Dooley
2022-09-05 18:14     ` Conor.Dooley
2022-09-06  1:57     ` Zong Li
2022-09-06  1:57       ` Zong Li
2022-09-05  8:31 ` [PATCH v2 4/6] soc: sifive: ccache: reduce printing on init Zong Li
2022-09-05  8:31   ` Zong Li
2022-09-05 18:36   ` Conor.Dooley
2022-09-05 18:36     ` Conor.Dooley
2022-09-06  1:40     ` Zong Li
2022-09-06  1:40       ` Zong Li
2022-09-05  8:31 ` [PATCH v2 5/6] soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes Zong Li
2022-09-05  8:31   ` Zong Li
2022-09-05 18:44   ` Conor.Dooley
2022-09-05 18:44     ` Conor.Dooley
2022-09-06  1:38     ` Zong Li
2022-09-06  1:38       ` Zong Li
2022-09-05  8:31 ` [PATCH v2 6/6] EDAC/sifive: use sifive_ccache instead of sifive_l2 Zong Li
2022-09-05  8:31   ` Zong Li

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