From: Marc Zyngier <maz@kernel.org>
To: <kvmarm@lists.cs.columbia.edu>, <kvmarm@lists.linux.dev>,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: Will Deacon <will@kernel.org>
Subject: [PATCH 05/17] arm64: Allow EL1 physical timer access when running VHE
Date: Thu, 20 Oct 2022 10:07:15 +0100 [thread overview]
Message-ID: <20221020090727.3669908-6-maz@kernel.org> (raw)
In-Reply-To: <20221020090727.3669908-1-maz@kernel.org>
To initialise the timer access from EL2 when HCR_EL2.E2H is set,
we must make use the CNTHCTL_EL2 formap used is appropriate.
This amounts to shifting the timer/counter enable bits by 10
to the left.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/el2_setup.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 668569adf4d3..fa1045f709bb 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -34,6 +34,11 @@
*/
.macro __init_el2_timers
mov x0, #3 // Enable EL1 physical timers
+ mrs x1, hcr_el2
+ and x1, x1, #HCR_E2H
+ cbz x1, .LnVHE_\@
+ lsl x0, x0, #10
+.LnVHE_\@:
msr cnthctl_el2, x0
msr cntvoff_el2, xzr // Clear virtual offset
.endm
--
2.34.1
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WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: <kvmarm@lists.cs.columbia.edu>, <kvmarm@lists.linux.dev>,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Quentin Perret <qperret@google.com>,
Will Deacon <will@kernel.org>, Fuad Tabba <tabba@google.com>
Subject: [PATCH 05/17] arm64: Allow EL1 physical timer access when running VHE
Date: Thu, 20 Oct 2022 10:07:15 +0100 [thread overview]
Message-ID: <20221020090727.3669908-6-maz@kernel.org> (raw)
Message-ID: <20221020090715.RcJyGr5AhnJacfJZZgPKNHpMO1843JZWh-l2KKBCIr8@z> (raw)
In-Reply-To: <20221020090727.3669908-1-maz@kernel.org>
To initialise the timer access from EL2 when HCR_EL2.E2H is set,
we must make use the CNTHCTL_EL2 formap used is appropriate.
This amounts to shifting the timer/counter enable bits by 10
to the left.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/el2_setup.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 668569adf4d3..fa1045f709bb 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -34,6 +34,11 @@
*/
.macro __init_el2_timers
mov x0, #3 // Enable EL1 physical timers
+ mrs x1, hcr_el2
+ and x1, x1, #HCR_E2H
+ cbz x1, .LnVHE_\@
+ lsl x0, x0, #10
+.LnVHE_\@:
msr cnthctl_el2, x0
msr cntvoff_el2, xzr // Clear virtual offset
.endm
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: <kvmarm@lists.cs.columbia.edu>, <kvmarm@lists.linux.dev>,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Quentin Perret <qperret@google.com>,
Will Deacon <will@kernel.org>, Fuad Tabba <tabba@google.com>
Subject: [PATCH 05/17] arm64: Allow EL1 physical timer access when running VHE
Date: Thu, 20 Oct 2022 10:07:15 +0100 [thread overview]
Message-ID: <20221020090727.3669908-6-maz@kernel.org> (raw)
In-Reply-To: <20221020090727.3669908-1-maz@kernel.org>
To initialise the timer access from EL2 when HCR_EL2.E2H is set,
we must make use the CNTHCTL_EL2 formap used is appropriate.
This amounts to shifting the timer/counter enable bits by 10
to the left.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/el2_setup.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 668569adf4d3..fa1045f709bb 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -34,6 +34,11 @@
*/
.macro __init_el2_timers
mov x0, #3 // Enable EL1 physical timers
+ mrs x1, hcr_el2
+ and x1, x1, #HCR_E2H
+ cbz x1, .LnVHE_\@
+ lsl x0, x0, #10
+.LnVHE_\@:
msr cnthctl_el2, x0
msr cntvoff_el2, xzr // Clear virtual offset
.endm
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-10-20 9:07 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-20 9:07 [PATCH 00/17] KVM: arm64: Allow using VHE in the nVHE hypervisor Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 01/17] arm64: Turn kaslr_feature_override into a generic SW feature override Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 02/17] arm64: Add KVM_HVHE capability and has_hvhe() predicate Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2023-06-01 7:01 ` Oliver Upton
2023-06-01 7:01 ` Oliver Upton
2022-10-20 9:07 ` [PATCH 03/17] arm64: Don't enable VHE for the kernel if OVERRIDE_HVHE is set Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 04/17] arm64: Prevent the use of is_kernel_in_hyp_mode() in hypervisor code Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier [this message]
2022-10-20 9:07 ` [PATCH 05/17] arm64: Allow EL1 physical timer access when running VHE Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 06/17] arm64: Use CPACR_EL1 format to set CPTR_EL2 when E2H is set Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 07/17] KVM: arm64: Elide kern_hyp_va() in VHE-specific parts of the hypervisor Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 08/17] KVM: arm64: Remove alternatives from sysreg accessors in VHE hypervisor context Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 09/17] KVM: arm64: Key use of VHE instructions in nVHE code off ARM64_KVM_HVHE Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 10/17] KVM: arm64: Force HCR_EL2.E2H when ARM64_KVM_HVHE is set Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 11/17] KVM: arm64: Disable TTBR1_EL2 when using ARM64_KVM_HVHE Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 12/17] KVM: arm64: Adjust EL2 stage-1 leaf AP bits when ARM64_KVM_HVHE is set Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 13/17] KVM: arm64: Rework CPTR_EL2 programming for HVHE configuration Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 14/17] KVM: arm64: Program the timer traps with VHE layout in hVHE mode Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 15/17] KVM: arm64: Force HCR_E2H in guest context when ARM64_KVM_HVHE is set Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 16/17] arm64: Allow arm64_sw.hvhe on command line Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` [PATCH 17/17] KVM: arm64: Terrible timer hack for M1 with hVHE Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
2022-10-20 9:07 ` Marc Zyngier
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