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From: Matt Ranostay <mranostay@ti.com>
To: <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>
Cc: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v5 5/8] arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support
Date: Wed, 2 Nov 2022 21:41:22 -0700	[thread overview]
Message-ID: <20221103044125.172864-6-mranostay@ti.com> (raw)
In-Reply-To: <20221103044125.172864-1-mranostay@ti.com>

From: Aswath Govindraju <a-govindraju@ti.com>

The board uses lane 1 of SERDES for USB. Set the mux
accordingly.

The USB controller and EVM supports super-speed for USB0
on the Type-C port. However, the SERDES has a limitation
that upto 2 protocols can be used at a time. The SERDES is
wired for PCIe, eDP and USB super-speed. It has been
chosen to use PCIe and eDP as default. So restrict
USB0 to high-speed mode.

Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
---
 .../dts/ti/k3-j721s2-common-proc-board.dts    | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index c3a397484c70..c787d46f89de 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -147,6 +147,12 @@ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
 			J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
 		>;
 	};
+
+	main_usbss0_pins_default: main-usbss0-pins-default {
+		pinctrl-single,pins = <
+			J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
+		>;
+	};
 };
 
 &wkup_pmx0 {
@@ -318,6 +324,22 @@ serdes0_pcie_link: phy@0 {
 	};
 };
 
+&usb_serdes_mux {
+	idle-states = <1>; /* USB0 to SERDES lane 1 */
+};
+
+&usbss0 {
+	pinctrl-0 = <&main_usbss0_pins_default>;
+	pinctrl-names = "default";
+	ti,vbus-divider;
+	ti,usb2-only;
+};
+
+&usb0 {
+	dr_mode = "otg";
+	maximum-speed = "high-speed";
+};
+
 &mcu_mcan0 {
 	status = "okay";
 	pinctrl-names = "default";
-- 
2.38.GIT


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WARNING: multiple messages have this Message-ID (diff)
From: Matt Ranostay <mranostay@ti.com>
To: <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>
Cc: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v5 5/8] arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support
Date: Wed, 2 Nov 2022 21:41:22 -0700	[thread overview]
Message-ID: <20221103044125.172864-6-mranostay@ti.com> (raw)
In-Reply-To: <20221103044125.172864-1-mranostay@ti.com>

From: Aswath Govindraju <a-govindraju@ti.com>

The board uses lane 1 of SERDES for USB. Set the mux
accordingly.

The USB controller and EVM supports super-speed for USB0
on the Type-C port. However, the SERDES has a limitation
that upto 2 protocols can be used at a time. The SERDES is
wired for PCIe, eDP and USB super-speed. It has been
chosen to use PCIe and eDP as default. So restrict
USB0 to high-speed mode.

Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
---
 .../dts/ti/k3-j721s2-common-proc-board.dts    | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index c3a397484c70..c787d46f89de 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -147,6 +147,12 @@ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
 			J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */
 		>;
 	};
+
+	main_usbss0_pins_default: main-usbss0-pins-default {
+		pinctrl-single,pins = <
+			J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
+		>;
+	};
 };
 
 &wkup_pmx0 {
@@ -318,6 +324,22 @@ serdes0_pcie_link: phy@0 {
 	};
 };
 
+&usb_serdes_mux {
+	idle-states = <1>; /* USB0 to SERDES lane 1 */
+};
+
+&usbss0 {
+	pinctrl-0 = <&main_usbss0_pins_default>;
+	pinctrl-names = "default";
+	ti,vbus-divider;
+	ti,usb2-only;
+};
+
+&usb0 {
+	dr_mode = "otg";
+	maximum-speed = "high-speed";
+};
+
 &mcu_mcan0 {
 	status = "okay";
 	pinctrl-names = "default";
-- 
2.38.GIT


  parent reply	other threads:[~2022-11-03  4:43 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-03  4:41 [PATCH v5 0/8] J721S2: Add support for additional IPs Matt Ranostay
2022-11-03  4:41 ` Matt Ranostay
2022-11-03  4:41 ` [PATCH v5 1/8] arm64: dts: ti: k3-j721s2-main: Add support for USB Matt Ranostay
2022-11-03  4:41   ` Matt Ranostay
2022-11-16  8:53   ` Ravi Gunasekaran
2022-11-16  8:53     ` Ravi Gunasekaran
2022-11-03  4:41 ` [PATCH v5 2/8] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node Matt Ranostay
2022-11-03  4:41   ` Matt Ranostay
2022-11-16  8:58   ` Ravi Gunasekaran
2022-11-16  8:58     ` Ravi Gunasekaran
2022-11-18  9:58     ` Matt Ranostay
2022-11-18  9:58       ` Matt Ranostay
2022-11-03  4:41 ` [PATCH v5 3/8] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI Matt Ranostay
2022-11-03  4:41   ` Matt Ranostay
2022-11-16  8:33   ` Vaishnav Achath
2022-11-16  8:33     ` Vaishnav Achath
2022-11-18 10:01     ` Matt Ranostay
2022-11-18 10:01       ` Matt Ranostay
2022-11-03  4:41 ` [PATCH v5 4/8] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Matt Ranostay
2022-11-03  4:41   ` Matt Ranostay
2022-11-16  8:54   ` Ravi Gunasekaran
2022-11-16  8:54     ` Ravi Gunasekaran
2022-11-03  4:41 ` Matt Ranostay [this message]
2022-11-03  4:41   ` [PATCH v5 5/8] arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support Matt Ranostay
2022-11-16  8:55   ` Ravi Gunasekaran
2022-11-16  8:55     ` Ravi Gunasekaran
2022-11-03  4:41 ` [PATCH v5 6/8] arm64: dts: ti: k3-j721s2: Add support for OSPI Flashes Matt Ranostay
2022-11-03  4:41   ` Matt Ranostay
2022-11-16  8:36   ` Vaishnav Achath
2022-11-16  8:36     ` Vaishnav Achath
2022-11-03  4:41 ` [PATCH v5 7/8] arm64: dts: ti: k3-j721s2-main: Add PCIe device tree node Matt Ranostay
2022-11-03  4:41   ` Matt Ranostay
2022-11-16 10:25   ` Siddharth Vadapalli
2022-11-16 10:25     ` Siddharth Vadapalli
2022-11-03  4:41 ` [PATCH v5 8/8] arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe Matt Ranostay
2022-11-03  4:41   ` Matt Ranostay
2022-11-16 10:26   ` Siddharth Vadapalli
2022-11-16 10:26     ` Siddharth Vadapalli

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