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From: Andre Przywara <andre.przywara@arm.com>
To: "Jernej Škrabec" <jernej.skrabec@gmail.com>
Cc: Samuel Holland <samuel@sholland.org>,
	Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	Icenowy Zheng <uwu@icenowy.me>,
	Gregory CLEMENT <gregory.clement@bootlin.com>,
	linux-i2c@vger.kernel.org
Subject: Re: [PATCH 4/9] ARM: dts: suniv: f1c100s: add I2C DT nodes
Date: Sun, 6 Nov 2022 23:12:50 +0000	[thread overview]
Message-ID: <20221106231214.7d2d8505@slackpad.lan> (raw)
In-Reply-To: <4223066.ejJDZkT8p0@jernej-laptop>

On Sun, 06 Nov 2022 09:09:17 +0100
Jernej Škrabec <jernej.skrabec@gmail.com> wrote:

> Dne torek, 01. november 2022 ob 15:16:53 CET je Andre Przywara napisal(a):
> > The Allwinner F1C100s series of SoCs contain three I2C controllers
> > compatible to the ones used in other Allwinner SoCs.
> > 
> > Add the DT nodes describing the resources of the controllers.
> > I2C1 has only one possible pinmux, so add the pinctrl properties for
> > that already.
> > At least one board connects an on-board I2C chip to PD0/PD12 (I2C0), so
> > include those pins already, to simplify referencing them later.
> > 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  arch/arm/boot/dts/suniv-f1c100s.dtsi | 50 ++++++++++++++++++++++++++++
> >  1 file changed, 50 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > b/arch/arm/boot/dts/suniv-f1c100s.dtsi index d5a6324e76465..2901c586971b4
> > 100644
> > --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > @@ -166,6 +166,18 @@ mmc0_pins: mmc0-pins {
> >  				drive-strength = <30>;
> >  			};
> > 
> > +			/omit-if-no-ref/
> > +			i2c0_pd_pins: i2c0-pd-pins {
> > +				pins = "PD0", "PD12";
> > +				function = "i2c0";
> > +			};
> > +
> > +			/omit-if-no-ref/  
> 
> Above flag is meaningless if i2c1_pins is always referenced by i2c1.

Indeed, good point.

> Anyway, I 
> see in pinctrl driver that there are actually two possible pin assignments for 
> i2c1. One on port D and another on port B.

Ah, those are the pins that are not documented in the manual (which is
where I looked at). I will drop that node.

Cheers,
Andre

> 
> Best regards,
> Jernej
> 
> > +			i2c1_pins: i2c1-pins {
> > +				pins = "PD5", "PD6";
> > +				function = "i2c1";
> > +			};
> > +
> >  			spi0_pc_pins: spi0-pc-pins {
> >  				pins = "PC0", "PC1", "PC2",   
> "PC3";
> >  				function = "spi0";
> > @@ -177,6 +189,44 @@ uart0_pe_pins: uart0-pe-pins {
> >  			};
> >  		};
> > 
> > +		i2c0: i2c@1c27000 {
> > +			compatible = "allwinner,suniv-f1c100s-i2c",
> > +				     "allwinner,sun6i-a31-i2c";
> > +			reg = <0x01c27000 0x400>;
> > +			interrupts = <7>;
> > +			clocks = <&ccu CLK_BUS_I2C0>;
> > +			resets = <&ccu RST_BUS_I2C0>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c1: i2c@1c27400 {
> > +			compatible = "allwinner,suniv-f1c100s-i2c",
> > +				     "allwinner,sun6i-a31-i2c";
> > +			reg = <0x01c27400 0x400>;
> > +			interrupts = <8>;
> > +			clocks = <&ccu CLK_BUS_I2C1>;
> > +			resets = <&ccu RST_BUS_I2C1>;
> > +			pinctrl-names = "default";
> > +			pinctrl-0 = <&i2c1_pins>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c2: i2c@1c27800 {
> > +			compatible = "allwinner,suniv-f1c100s-i2c",
> > +				     "allwinner,sun6i-a31-i2c";
> > +			reg = <0x01c27800 0x400>;
> > +			interrupts = <9>;
> > +			clocks = <&ccu CLK_BUS_I2C2>;
> > +			resets = <&ccu RST_BUS_I2C2>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +		};
> > +
> >  		timer@1c20c00 {
> >  			compatible = "allwinner,suniv-f1c100s-  
> timer";
> >  			reg = <0x01c20c00 0x90>;  
> 
> 
> 
> 
> 


WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: "Jernej Škrabec" <jernej.skrabec@gmail.com>
Cc: Samuel Holland <samuel@sholland.org>,
	Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	Icenowy Zheng <uwu@icenowy.me>,
	Gregory CLEMENT <gregory.clement@bootlin.com>,
	linux-i2c@vger.kernel.org
Subject: Re: [PATCH 4/9] ARM: dts: suniv: f1c100s: add I2C DT nodes
Date: Sun, 6 Nov 2022 23:12:50 +0000	[thread overview]
Message-ID: <20221106231214.7d2d8505@slackpad.lan> (raw)
In-Reply-To: <4223066.ejJDZkT8p0@jernej-laptop>

On Sun, 06 Nov 2022 09:09:17 +0100
Jernej Škrabec <jernej.skrabec@gmail.com> wrote:

> Dne torek, 01. november 2022 ob 15:16:53 CET je Andre Przywara napisal(a):
> > The Allwinner F1C100s series of SoCs contain three I2C controllers
> > compatible to the ones used in other Allwinner SoCs.
> > 
> > Add the DT nodes describing the resources of the controllers.
> > I2C1 has only one possible pinmux, so add the pinctrl properties for
> > that already.
> > At least one board connects an on-board I2C chip to PD0/PD12 (I2C0), so
> > include those pins already, to simplify referencing them later.
> > 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  arch/arm/boot/dts/suniv-f1c100s.dtsi | 50 ++++++++++++++++++++++++++++
> >  1 file changed, 50 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > b/arch/arm/boot/dts/suniv-f1c100s.dtsi index d5a6324e76465..2901c586971b4
> > 100644
> > --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > @@ -166,6 +166,18 @@ mmc0_pins: mmc0-pins {
> >  				drive-strength = <30>;
> >  			};
> > 
> > +			/omit-if-no-ref/
> > +			i2c0_pd_pins: i2c0-pd-pins {
> > +				pins = "PD0", "PD12";
> > +				function = "i2c0";
> > +			};
> > +
> > +			/omit-if-no-ref/  
> 
> Above flag is meaningless if i2c1_pins is always referenced by i2c1.

Indeed, good point.

> Anyway, I 
> see in pinctrl driver that there are actually two possible pin assignments for 
> i2c1. One on port D and another on port B.

Ah, those are the pins that are not documented in the manual (which is
where I looked at). I will drop that node.

Cheers,
Andre

> 
> Best regards,
> Jernej
> 
> > +			i2c1_pins: i2c1-pins {
> > +				pins = "PD5", "PD6";
> > +				function = "i2c1";
> > +			};
> > +
> >  			spi0_pc_pins: spi0-pc-pins {
> >  				pins = "PC0", "PC1", "PC2",   
> "PC3";
> >  				function = "spi0";
> > @@ -177,6 +189,44 @@ uart0_pe_pins: uart0-pe-pins {
> >  			};
> >  		};
> > 
> > +		i2c0: i2c@1c27000 {
> > +			compatible = "allwinner,suniv-f1c100s-i2c",
> > +				     "allwinner,sun6i-a31-i2c";
> > +			reg = <0x01c27000 0x400>;
> > +			interrupts = <7>;
> > +			clocks = <&ccu CLK_BUS_I2C0>;
> > +			resets = <&ccu RST_BUS_I2C0>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c1: i2c@1c27400 {
> > +			compatible = "allwinner,suniv-f1c100s-i2c",
> > +				     "allwinner,sun6i-a31-i2c";
> > +			reg = <0x01c27400 0x400>;
> > +			interrupts = <8>;
> > +			clocks = <&ccu CLK_BUS_I2C1>;
> > +			resets = <&ccu RST_BUS_I2C1>;
> > +			pinctrl-names = "default";
> > +			pinctrl-0 = <&i2c1_pins>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +		};
> > +
> > +		i2c2: i2c@1c27800 {
> > +			compatible = "allwinner,suniv-f1c100s-i2c",
> > +				     "allwinner,sun6i-a31-i2c";
> > +			reg = <0x01c27800 0x400>;
> > +			interrupts = <9>;
> > +			clocks = <&ccu CLK_BUS_I2C2>;
> > +			resets = <&ccu RST_BUS_I2C2>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +		};
> > +
> >  		timer@1c20c00 {
> >  			compatible = "allwinner,suniv-f1c100s-  
> timer";
> >  			reg = <0x01c20c00 0x90>;  
> 
> 
> 
> 
> 


_______________________________________________
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  reply	other threads:[~2022-11-06 23:14 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-01 14:16 [PATCH 0/9] ARM: dts: suniv: F1C100s: add more peripherals Andre Przywara
2022-11-01 14:16 ` Andre Przywara
2022-11-01 14:16 ` [PATCH 1/9] dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-02 17:28   ` Rob Herring
2022-11-02 17:28     ` Rob Herring
2022-11-17 12:05   ` Uwe Kleine-König
2022-11-17 12:05     ` Uwe Kleine-König
2022-11-01 14:16 ` [PATCH 2/9] ARM: dts: suniv: f1c100s: add PWM node Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-06  7:56   ` Jernej Škrabec
2022-11-06  7:56     ` Jernej Škrabec
2022-11-17 12:03   ` Uwe Kleine-König
2022-11-17 12:03     ` Uwe Kleine-König
2022-11-17 13:43     ` Andre Przywara
2022-11-17 13:43       ` Andre Przywara
2022-11-01 14:16 ` [PATCH 3/9] dt-bindings: i2c: mv64xxx: Add F1C100s compatible string Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-02 17:28   ` Rob Herring
2022-11-02 17:28     ` Rob Herring
2022-11-02 20:19   ` Wolfram Sang
2022-11-02 20:19     ` Wolfram Sang
2022-11-01 14:16 ` [PATCH 4/9] ARM: dts: suniv: f1c100s: add I2C DT nodes Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-06  8:09   ` Jernej Škrabec
2022-11-06  8:09     ` Jernej Škrabec
2022-11-06 23:12     ` Andre Przywara [this message]
2022-11-06 23:12       ` Andre Przywara
2022-11-01 14:16 ` [PATCH 5/9] clk: sunxi-ng: f1c100s: Add IR mod clock Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-06  8:22   ` Jernej Škrabec
2022-11-06  8:22     ` Jernej Škrabec
2022-11-01 14:16 ` [PATCH 6/9] dt-bindings: media: IR: Add F1C100s IR compatible string Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-02 17:28   ` Rob Herring
2022-11-02 17:28     ` Rob Herring
2022-11-01 14:16 ` [PATCH 7/9] ARM: dts: suniv: f1c100s: add CIR DT node Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-06  8:23   ` Jernej Škrabec
2022-11-06  8:23     ` Jernej Škrabec
2022-11-01 14:16 ` [PATCH 8/9] dt-bindings: input: sun4i-lradc-keys: Add F1C100s compatible Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-02 17:28   ` Rob Herring
2022-11-02 17:28     ` Rob Herring
2022-11-03 20:45   ` Dmitry Torokhov
2022-11-03 20:45     ` Dmitry Torokhov
2022-11-01 14:16 ` [PATCH 9/9] ARM: dts: suniv: f1c100s: add LRADC node Andre Przywara
2022-11-01 14:16   ` Andre Przywara
2022-11-06  8:25   ` Jernej Škrabec
2022-11-06  8:25     ` Jernej Škrabec

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